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ADS1119: ADS 1119 measurement interference

kawann Silva
Prodigy 30 points
Part Number: ADS1119

Hello.

I use ADS 1119 in several projects and basically the same topology for several projects, recently I'm having a problem when the value of one of the channels saturates to close to 4900mV the value of another channel that is at 900mV starts to vary, I've had a similar problem the one when the value of one of the channels was more negative than the GND, but this is not the case, I already replaced the chip a few times even so after a while it returns to present the same problem.

Other than that, I have some doubts, configuring the ADC as a differential, if the result of the subtraction between two channels is more negative than the GND, can the ADC present a problem?

Thanks

  • 0
    Prodigy 30 points

    The adc is configured with an external reference of 4098mV

  • 0
    TI__Guru** 113765 points

    Hi kawaan Silva,

    Welcome to the E2E forum!   The ADS1119 measures a value AINP relative to AINN.  If AINP is more positive in input voltage than AINN the outcome will be positive codes ranging from 0x0000 to 0x7FFF.  If AINN is more positive in input voltage than AINP then the outcome will be negative and the result returned is binary 2's complement from 0xFFFF (-1 decimal) to 0x8000 which is negative full-scale.

    All that said, the ADS1119 can only have a unipolar analog supply.  The analog input should never exceed the supply by more than 300mV or the absolute maximum ratings for the ADS1119 will be exceeded and can damage the device.  Also, to be able to maintain an accurate measurement the analog inputs should never go below AGND by more than 100mV or beyond AVDD by more than 100mV.  This information is given in section 6.3 of the ADS1119 datasheet.

    It is also helpful to limit any transient current or small voltage excursions below ground or above AVDD where the ESD diodes within the ADC might conduct.  The absolute maximum current for any analog input is +/- 10mA as given in the table of section 6.1 of the datasheet.  Adding a series resistance can prevent the input current from exceeding 10mA if the ESD diodes conduct.

    If your input voltage exceeds the reference voltage you may see some analog settling when switching mux channels.  If this is the case, you can verify by taking several conversion cycles on the same input channel to see if the conversion value settles to the nominal input voltage.

    As to the measurement itself, there really is no difference in the operation of the ADC with respect to single-ended and differential measurements.  In both cases AINP is measured relative to AINN.  However neither AINP or AINN should go below analog ground.

    Best regards,

    Bob B

  • 0 in reply to Bob Benjamin
    Prodigy 30 points

    Hi Bob

    . First thanks for the responses.

    I still can't understand how a value in one channel can interfere in another, because I said that I'm using the same topology that I use in other circuits that already work, and I'm really having problems. I'm using 3 channels, and all measurements are "unique", none of them are out of datasheet standards, the only difference I have from this circuit to other circuits that work is that the AIN3 is not connected to ground.

    Do you have any tests you can do to better understand what's going on? I am sending a photo of the topology that I use in other projects and that is working until today, the only difference from the current circuit to this one in the photo is that I use 3 channels and the AIN3 is not connected to ground.

    Thanks .

  • 0 in reply to kawann Silva
    TI__Guru** 113765 points

    Hi kawaan Silva,

    The input mux for the ADS1119 is break-before-make so it is not clear how one channel is affected by the other.  We have seen cases where if the input voltage exceeds the analog supply voltage current can flow inside the ADS1119 in paths not intended within the design operating parameters due to conduction of the ESD diodes.  A similar problem can exist if the input goes below analog ground.

    There are several items that are unclear:

    • It would be helpful to know the specific device configuration being used.
    • It would be helpful to know how the input voltage is connected and values of resistance in the input path.  Your schematic snippet does not show what you are actually doing only that it is similar.  A more complete schematic would be helpful.
    • You have stated that AIN3 is not connected to ground, but is it floating or connected to some other source?
    • It would be helpful to know how the analog and digital grounds are connected.  You show a single supply source but two different ground symbols.
    • How are you measuring the input voltage?  You should measure the external voltages as close as possible to the ADC for both the input and ground.
    • Is this some form of prototyping solution or are you using a PCB?
    • Your input source voltage ground should be connected to analog ground.  Is this the way your input voltage is connected?  I have seen AC powered sources not connected properly with respect to ground where the AC source is outputting the correct voltage but can be +40V offset above ADC analog ground. So the ground reference must be a single point.
    • You stated that one input is 4900mV.  How was this measured?  Are you getting a positive full-scale reading as you stated that the reference is 4098mV?
    • Can you share the output code (hex preferred and not converted to a voltage) from the ADC for a series of both continuous/contiguous (no missing conversions) for at least 128 measurements when this condition exists for both of the channels being measured?

    Best regards,

    Bob B

  • 0 in reply to Bob Benjamin
    Prodigy 30 points

    Hi Bob.

    Once again thank you for the responses.

    I have land plans for DGND and AGND, but they are connected, the difference is that each one has a specific treatment.
    The analog and digital supply voltage are at 5Vdc, my circuits that precede the ADC are also at 5Vdc, so when my Amp.Ops saturate they are putting some value close to 5vdc (eg: 4900mV) at the ADC input, the conversion is being made in relation to GND and not differential.
    As my REFP is 4098mV, do you see any problem in putting a signal at the ADC input that is higher than my reference voltage?

    I don't use any AC signal.

    In all channels I have a series resistance of 10k to limit the current and also make an RC low pass filter.

    The AIN3 is not floating, it is coupled to a read signal as well

    Thanks

  • 0 in reply to kawann Silva
    TI__Guru** 113765 points

    Hi kawaan Silva,

    It is not clear to me what you mean regarding that for the grounds "each one has a specific treatment".  The AGND and DGND should have a direct low impedance connection at the ADS1119.  This means that no inductance or ferrites should be placed between the grounds.

    I would still like to see the actual schematic you are using.  It is difficult for me to understand how the inputs are driven and what is connected to the amplifiers that would cause them to go into saturation.

    kawann Silva said:
    As my REFP is 4098mV, do you see any problem in putting a signal at the ADC input that is higher than my reference voltage?

    This is not an issue as long as the input voltage does not exceed the AVDD of the ADS1119.  As the input is beyond the reference voltage the conversion result will be positive full-scale (0x7FFF).

    kawann Silva said:
    I don't use any AC signal.

    My concern was not that an AC signal is being applied to the ADC, but rather a DC voltage powered from an AC source like a bench supply.

    kawann Silva said:
    In all channels I have a series resistance of 10k to limit the current and also make an RC low pass filter.

    If the filter resistance is 10k and the filter cap is 4.7uF, this is a very long time constant (~100ms) and the filter cutoff frequency is very low.  It is not clear to me why this much filtering is needed.  Any voltage change will take a number of conversion cycles to see a settled result.  See section 9.1.4 regarding the design of the Analog Input Filtering.  Delta-Sigma ADCs have an internal digital low-pass filter that you use to aid in filtering.  You may try reducing the filter values to see if the issue are seeing persists.

    It would also be helpful for me if you would respond to my previously requested information.

    Best regards,

    Bob B

  • 0 in reply to Bob Benjamin
    Prodigy 30 points

    Hi Bob.

    I'm posting schematic in a reduced form for project security reasons, maybe this can help you to better understand all your questions.

    The adc U4 that is after the isolator is working normally and is basically the same topology, the ADC U5 that is before the isolator (SI86D5) is the one that is showing the problems I mentioned earlier.

    Regarding the grounds, consider that they are connected, and the resistance between them is practically zero.

    Thanks again for your attention

  • 0 in reply to kawann Silva
    TI__Guru** 113765 points

    Hi kawaan Silva,

    The cap loading on U1 is quite large as C4 is 10uF.  Have you checked to make sure that the output is not oscillating at junction P1? 

    I still have concerns regarding the grounds.  Your analog ground is the same as the shown at the isolator which is passing a digital signal.  But the ground connected to the digital of U5 is a different ground.  

    I am also surprised that you do not have communication issues using 22k pullups on the I2C bus.  You must be using a very slow SCL clock.  I would verify that the communication is working as expected and that you are not mixing conversion data.  Again I request that you send me the configuration you are using for U5.

    There is R48 which is a 10k filter resistance on AIN1, but only ferrites shown for AIN0 and AIN3.  Is there a chance that these inputs could exceed the supply?

    Otherwise I see no other potential reason as to why you are having issues.

    Best regards,

    Bob B