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ADS1255 Single shot timing.

Rene Hamer
Prodigy 30 points

Other Parts Discussed in Thread: ADS1255, ADS1258

Hi

i'm planning to use a ADS1255 with an external multiplexer for continuous data acquisition.

To maintain accurate conversion times I need to know the exact timing of a single shot conversion.

Unfortunately the tables 13,14,15 in the data sheet only give time at a given clock rate.

When I try to convert back to clock cycles I get more confused.

Fosc

7.68E+06

SPS [Hz]

t18 [s]

averidge

DRDY periodes

conversion time

difference

in cycles

30000

2.10E-04

1

5

1.67E-04

4.33E-05

333

15000

2.50E-04

2

3

2.00E-04

5.00E-05

384

7500

3.10E-04

4

2

2.67E-04

4.33E-05

333

3750

4.40E-04

8

1

2.67E-04

1.73E-04

1331

2000

6.80E-04

15

1

5.00E-04

1.80E-04

1382

Does anyone know the exact timing in clock cycles of a single shot conversion?

Secondly, we will have to use an external clock up to 10 MHz, are there any known issues at 10 Mhz.

 

 

  • 0
    TI__Guru**** 182881 points

    Hi Rene,

    Welcome to the forum!  The three tables you cite above are showing different operating aspects of the ADS1255.  The values you have listed above as 'conversion time' appear to be 1/Sample Rate * DRDY Periods, which is not the right way to think about it.  Table 13 shows settling time and Table 14 shows the effective data rate when using the SYNC command or when pulsing the SYNC pin (refer to Figure 18 and 19). 

    You mention above that you want to do continuous acquisition using an external mux on the ADS1255, but you are asking about the timing of single shot mode.  Do you plan on using the SYNC pin or SYNC command while switching through your external MUX?  If this is the case, you can use the t18times from Table 13 and convert them to clock cycles.  For the 30,000SPS data rate, the clock cycles are going to be 0.21ms * 1/Fosc or about 1613 cycles assuming the 7.68MHz oscillator.

  • 0 in reply to Tom Hendrick
    Prodigy 30 points

    Hi Tom,

    Thanks for the response.

    Yes we plan to use an external mux and continuously cycle through all the mux channels.

    From the datasheet, the single shot mode is recommended.

    This application uses a wide range of sampling rates, but the sample rates need to be exact.  We use an FPGA to control the ADC, so we can time it as we want, but I need to know timing in cycles to generate exact sampling rates. Please note the jump in timing at lower SPS.

    Secondly; our highest sampling rate would be 4 KSPS on the ADC, in single shot mode this mains a setting of 30KSPS. When I push the ADC to 10.2MHz clock I can use lower sampling rates , hopefully yielding better SNR numbers. Please comment.

     

    Looking forward to hear from you,

    Rene

  • 0 in reply to Rene Hamer
    TI__Mastermind 43915 points

    Hi Rene,

    As Tom mentioned, tables 13 and 14 along with their corresponding figures are where you are going to want to look. As for the data rates, they will follow Table 14 as long as you are using a 7.68MHz oscillator. As that oscillator frequency changes, the data rates will scale. Now, pushing the ADC master (fclk freq) clock up to 10.2MHz (10MHz max) will be out of spec and we cannot guarantee performance. Lowering the data rate will decrease the Nyquist frequency and should improve some of your AC specs. Rather than time out when to read back conversions, I would make sure that you monitor /DRDY as an interrupt to synchronize the system. In order to get the 4KSPS throughput, you are going to need to use the 30kSPS data rate when using a 7.68MHz oscillator. If a faster fclk is used, all the data rates will either scale up or down (depending on the fclk).

    Regards,

    Tony Calabria

     

  • 0 in reply to Tony Calabria
    Prodigy 30 points

    Hi Tony,

    thanks, but I only asked how many clock cycles it takes. My application would run border line and I to needed to know precise timing.

    I decided not to go with this part, simple not giving enough margin in my design . 

    The ADS1258, offers plenty of margin and it gives me the information I want , see spec sheet page 18 equations 2 and 3. ( Not that I needed it for this part.)

    I'm currently evaluating the ads1258 , it looks very impressive.

    Would be nice to have this part in a small package and a 2 channel mux.

    Thanks for the help, it looks like my problem is solved by using the ads1258.

    Regards,
    Rene