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DAC81416EVM: The DAC chip 81416 Init function and Main function - Register name and Values to be updated

SIVAKUMAR MARIAPPAN
Prodigy 40 points

Part Number: DAC81416EVM

Hello all,

We are developing a Cell voltage emulator module, which outputs analog voltage from the Digital input from SPI.

We would like to use this DAC81416 chip interfaced with a Micro controller to send the Digital data through SPI to convert it as Analog output using DAC81416.

Now we would request you to send the list down the Register and its values to be programmed / configured as part of Initialization function.

void Init_DAC_Chip(void)

{
00h NOP NOP Register  = ???
01h DEVICEID Device ID Register = ???
02h STATUS Status Register = ???
03h SPICONFIG SPI Configuration Register = ???
04h GENCONFIG General Configuration Register = = ???
05h BRDCONFIG Broadcast Configuration Register = ???
06h SYNCCONFIG Sync Configuration Register == ???
07h TOGGCONFIG0 DAC[15:8] Toggle Configuration Register = ???
08h TOGGCONFIG1 DAC[7:0] Toggle Configuration Register = ???
09h DACPWDWN DAC Power-Down Register = ???
0Ah DACRANGE0 DAC[15:12] Range Register = ???
0Bh DACRANGE1 DAC[11:8] Range Register  = ???
0Ch DACRANGE2 DAC[7:4] Range Register = ???
0Dh DACRANGE3 DAC[3:0] Range Register = ???
0Eh TRIGGER Trigger Register = ???
0Fh BRDCAST Broadcast Data Register = ???
10h DAC0 DAC0 Data Register = ???
11h DAC1 DAC1 Data Register  = ???
12h DAC2 DAC2 Data Register = ???
13h DAC3 DAC3 Data Register = ???
14h DAC4 DAC4 Data Register = ???
15h DAC5 DAC5 Data Register = ???
16h DAC6 DAC6 Data Register = ???
17h DAC7 DAC7 Data Register = ???
18h DAC8 DAC8 Data Register = ???
19h DAC9 DAC9 Data Register = ???
1Ah DAC10 DAC10 Data Register = ???
1Bh DAC11 DAC11 Data Register  = ???
1Ch DAC12 DAC12 Data Register = ???
1Dh DAC13 DAC13 Data Register = ???
1Eh DAC14 DAC14 Data Register = ???
1Fh DAC15 DAC15 Data Register= ???
20h OFFSET0 DAC[14-15;12-13] Differential Offset Register = ???
21h OFFSET1 DAC[10-11;8-9] Differential Offset Register = ???
22h OFFSET2 DAC[6-7;4-5] Differential Offset Register = ???
23h OFFSET3 DAC[2-3;0-1] Differential Offset Register = ???

}

Also we request you to list down the registers to be updated during main function to covert the Digital data to Analog voltage.

void DAC_SPI_Transmission_Chip(void)  - This function is called in 10mSec time loop.

{

To be updated

}

Many thanks

With kind regards

Siva

  • 0
    TI__Expert 5130 points

    Hi Siva,

    1. please use following register values for initialisation of DAC81416

    00h NOP NOP Register  >> 0x0000
    01h DEVICEID Device ID Register >> ignore, it's only read register
    02h STATUS Status Register >> ignore, it's only read register


    03h SPICONFIG SPI Configuration Register >> write DEV-PWDWN bit  = 0 to set the device in active mode, set other bits as per your requirements otherwise use default values


    04h GENCONFIG General Configuration Register >> write REF-PWDWN bit = 0 if external reference is connected, set other bits as per your requirements otherwise use default values

     
    05h BRDCONFIG Broadcast Configuration Register >> when DACx-BRDCAST-EN bit set to 1, the corresponding DACx is set to update its output to the value set in the BRDCAST register. All DACx channels must be configured in single-ended mode for broadcast operation. If one or more outputs are configured in differential mode the broadcast mode is ignored. When cleared to 0 the corresponding DACx output remains unaffected by a BRDCAST command


    06h SYNCCONFIG Sync Configuration Register >> when DACx-SYNC-EN bit set to 1 the corresponding DACx output is set to update in response to an LDAC trigger (synchronous mode) and when set to 0 the corresponding DACx output is set to update immediately (asynchronous mode).


    07h TOGGCONFIG0 DAC[15:8] Toggle Configuration Register >> ignore, it's only for toggle mode
    08h TOGGCONFIG1 DAC[7:0] Toggle Configuration Register >> it's only for toggle mode


    09h DACPWDWN DAC Power-Down Register >> write DACx-PWDWN bit  = 0 to set the DACx channel in active mode
    0Ah DACRANGE0 DAC[15:12] Range Register >> sets the output range for the DAC Ch#3; 

                                                                                     > 0000 = 0 to 5 V,

                                                                                     > 0001 = 0 to 10 V,

    > 0010 = 0 to 20 V,

    > 0100 = 0 to 40 V,

    > 1001 = -5 V to +5 V,

    > 1010 = -10 V to +10 V,

    > 1100 = -20 V to +20 V,

    > 1110 = -2.5 V to +2.5 V,

    > All others: invalid


    0Bh DACRANGE1 DAC[11:8] Range Register  >>  sets the output range for the DAC Ch#2; 

                                                                                     > 0000 = 0 to 5 V,

                                                                                     > 0001 = 0 to 10 V,

    > 0010 = 0 to 20 V,

    > 0100 = 0 to 40 V,

    > 1001 = -5 V to +5 V,

    > 1010 = -10 V to +10 V,

    > 1100 = -20 V to +20 V,

    > 1110 = -2.5 V to +2.5 V,

    > All others: invalid


    0Ch DACRANGE2 DAC[7:4] Range Register >>  sets the output range for the DAC Ch#1; 

                                                                                     > 0000 = 0 to 5 V,

                                                                                     > 0001 = 0 to 10 V,

    > 0010 = 0 to 20 V,

    > 0100 = 0 to 40 V,

    > 1001 = -5 V to +5 V,

    > 1010 = -10 V to +10 V,

    > 1100 = -20 V to +20 V,

    > 1110 = -2.5 V to +2.5 V,

    > All others: invalid


    0Dh DACRANGE3 DAC[3:0] Range Register >>  sets the output range for the DAC Ch#0; 

                                                                                     > 0000 = 0 to 5 V,

                                                                                     > 0001 = 0 to 10 V,

    > 0010 = 0 to 20 V,

    > 0100 = 0 to 40 V,

    > 1001 = -5 V to +5 V,

    > 1010 = -10 V to +10 V,

    > 1100 = -20 V to +20 V,

    > 1110 = -2.5 V to +2.5 V,

    > All others: invalid


    0Eh TRIGGER Trigger Register >> set trigger bits as per your requirements otherwise use default values (for more details please check data-sheet)


    0Fh BRDCAST Broadcast Data Register >> writing to the BRDCAST register forces those DAC channels that have been set to broadcast in the BRDCONFIG register to update its data register data to the BRDCAST-DATA one, otherwise ignore


    10h DAC0 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    11h DAC1 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    12h DAC2 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    13h DAC3 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    14h DAC4 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    15h DAC5 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    16h DAC6 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    17h DAC7 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    18h DAC8 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    19h DAC9 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    1Ah DAC10 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    1Bh DAC11 Data Register  >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    1Ch DAC12 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    1Dh DAC13 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    1Eh DAC14 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    1Fh DAC15 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore

    20h OFFSET0 DAC[14-15;12-13] Differential Offset Register >> ignore, it's only for deferential  mode (for more details please check data-sheet)
    21h OFFSET1 DAC[10-11;8-9] Differential Offset Register >> ignore, it's only for deferential  mode (for more details please check data-sheet)
    22h OFFSET2 DAC[6-7;4-5] Differential Offset Register >> ignore, it's only for deferential  mode (for more details please check data-sheet)
    23h OFFSET3 DAC[2-3;0-1] Differential Offset Register >> ignore, it's only for deferential  mode (for more details please check data-sheet)

    2. please use following register values for main loop to convert the DAC code to voltage of DAC81416

    a. for broadcast mode update :

    0Fh BRDCAST Broadcast Data Register >> writing to the BRDCAST register forces those DAC channels that have been set to broadcast in the BRDCONFIG register to update its data register data to the BRDCAST-DATA one, otherwise ignore

    b. for normal mode update :

    10h DAC0 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    11h DAC1 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    12h DAC2 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    13h DAC3 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    14h DAC4 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    15h DAC5 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    16h DAC6 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    17h DAC7 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    18h DAC8 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    19h DAC9 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    1Ah DAC10 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    1Bh DAC11 Data Register  >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    1Ch DAC12 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    1Dh DAC13 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    1Eh DAC14 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore
    1Fh DAC15 Data Register >> writing to this register forces DAC channel to update its data register data and hence DAC output, otherwise ignore

    Let me know for any more clarification or please refer to the data-sheet of DAC81416 for more details.

    Thanks,

    Sanjay

  • 0 in reply to Sanjay
    Prodigy 40 points

    Hi Sanjay

    I hope you are doing great. Many thanks for your inputs. 

    I would like to give you more information on the project and issue we are observing now.

     

    1. We are developing a Battery Cell voltage emulation module using a NXP MCU S32K144interfaced with TI DAC chip DAC81416.
    2. We are using S32K144EVM-Q100 evaluation board which is interfaced with our DAC81416EVM board through SPI.
    3. The SPI driver is working fine on the Micro controller module as a Master.
    4. We have configured the SPI module as a master, chip select as active low and data is clocked during SCK active low and 32 bit data per frame in Micro-controller module
    5. Here is the SPI configuration in main Micro-controller as a master.

    const lpspi_master_config_t lpspi_0_MasterConfig0 = {

      .bitsPerSec = 1000000UL,

      .whichPcs = LPSPI_PCS1,

      .pcsPolarity = LPSPI_ACTIVE_LOW,

      .isPcsContinuous = false,

      .bitcount = 32U,

      .lpspiSrcClk = 8000000UL,

      .clkPhase = LPSPI_CLOCK_PHASE_2ND_EDGE,

      .clkPolarity = LPSPI_SCK_ACTIVE_LOW,

      .lsbFirst = false,

      .transferType = LPSPI_USING_INTERRUPTS,

      .rxDMAChannel = 0U,

      .txDMAChannel = 0U,

      .callback = NULL,

      .callbackParam = NULL

    };

    1. The following registers are used to configure SPI (24 bit per frame) and send the data through DAC0 channel to convert the digital data to analog voltage.  it was not working. Internal reference voltage is not available at TP12.

    #define SPICONFIG                0x00030004u

    #define GENCONFIG                0x00043F00u

    #define BRDCONFIG                0x00050000u

    #define SYNCCONFIG               0x00060000u

    #define TOGGCONFIG0              0x00070000u

    #define TOGGCONFIG1              0x00080000u

    #define DACPWDWN                  0x00090000u

    #define DACRANGE0                0x000A0000u

    #define DACRANGE1                0x000B0000u

    #define DACRANGE2                0x000C0000u

    #define DACRANGE3                0x000D0000u

    #define TRIGGER                   0x000E0000u

    #define BRDCAST                   0x000F0000u

    #define OFFSET0                   0x00200000u

    #define OFFSET1                   0x00210000u

    #define OFFSET2                   0x00220000u

    #define OFFSET3                   0x00230000u

    1. Since MSB is sent first (appended with zero on the last byte) , The following registers are updated  to configure SPI and send the data through DAC0 channel to convert the digital data to analog voltage. it was not working. Internal reference voltage is not available at TP12.

    #define SPICONFIG                0x03000400u

    #define GENCONFIG                0x043F0000u

    #define BRDCONFIG                0x05000000u

    #define SYNCCONFIG               0x06000000u

    #define TOGGCONFIG0              0x07000000u

    #define TOGGCONFIG1              0x08000000u

    #define DACPWDWN                  0x09000000u

    #define DACRANGE0                0x0A000000u

    #define DACRANGE1                0x0B000000u

    #define DACRANGE2                0x0C000000u

    #define DACRANGE3                0x0D000000u

    #define TRIGGER                   0x0E000000u

    #define BRDCAST                   0x0F000000u

    #define OFFSET0                   0x20000000u

    #define OFFSET1                   0x21000000u

    #define OFFSET2                   0x22000000u

    #define OFFSET3                   0x23000000u

    1. Similarly the Data is sent in both formats and Voltages are not available at the output pin.

    #define DAC0                      0x00103FFFu

    #define DAC1                      0x00117FFFu

    #define DAC14                     0x001EBFFFu

    #define DAC15                     0x001FFFFFu

     

    #define DAC0                      0x103FFF00u

    #define DAC1                      0x117FFF00u

    #define DAC14                     0x1EBFFF00u

    #define DAC15                     0x1FFFFF00u

    1. It is clear that SPI driver is working as a master in the micro-controller 32 bit per frame. We could not configure this our DAC81416 and send the data through SPI and see the analog voltage at the output pin.
    2. MCU is configured for 32 bit per frame and DAC is configured for 24 bit per frame. How to handle the difference in frame (number of bits) length between  MCU and DAC chip please?

     

    Please help me out to fix this issue. We can have a teams meeting to show this issue better, If you are available. Also please call me on my mobile +44 7934 466587 to discuss in detail.

     

    Quick request. We have configured the SPI as a master in S32K144 MCU and interfaced with DAC81416EVM through SPI.

    The S32K144 MCU is configured as SPI Master for 32bit per frame and DAC81416 is configured for SPI with 24 bit per frame. CRC mechanism is disabled.

    How do we handle this scenario please? MCU master should transmit only 24 bit data or 32 bit data appended with Zeros in MSB (8 bits) or 32 bit data appended with zeros in LSB (8 bits). Please help us out to fix this issue at the earliest.

    If we can fix this issue with 24 bit per frame, we are happy to go ahead. 

     If not, we wanted to use 32 bit frame along with CRC checking mechanism, We need to send the CRC along with the data right? Now I would request you to share the C code / function to calculate the CRC please.

    Once the CRC is calculated, then we can pack the new 32 bit frame and send it DAC module DAC81416EVM through SPI.

    Many thanks,

    With kind regards

    Siva

  • 0 in reply to SIVAKUMAR MARIAPPAN
    TI__Expert 5130 points

    Hi Siva,

    Can we have a quick debug session to understand the issue better ?

    Mean time, i will look at this issue and will try to figure out what might be going wrong in this case.

    Regards,

    Sanjay