Dear Sir,
I am using ADS1232 for one of my application at 17 bit resolution. I got a offset problem. Eg., 242 counts(after power on) on one day and it drifts to 221 or 268(after power on) on another day. But my total count for 100 gm weight remains the same for all the offset, i-e., linearity is always present.
Using 7805 for my application. AVDD(5V) & REF + are shorted. Speed: 10SPS and gain of 128. I accept that the layout is not designed with much care, like your reference design. But it's too late.
I) I was unable to get the PPF poly capacitor for the reference part & input part. Using only 100pF NPO(5%) and 10nF NPO(5%) and 100nF X7R (5%). Will these do the expected?
Question:
II) I am using the internal clock of the ADC. If I put a external crystal of 3.6864MHz, what is the data rate, I can expect? Similarly for ,
external crystal of 2.4576MHz, what is the data rate, I can expect? Speed: Low and gain of 128
III) Is it possible to reduce my noise level in my board, by decreasing the Clock speed? what are the other effects, if I reduce my clock speed? Will the 50Hz & 60 Hz rejection process get affected?
IV) Also suggest me the correct value of reduced external crystal, considering all the necessary parameters.
V) I am using a 1K + 30E Bead in series and with 100pF parallel ( low pass- similar to your reference design) to my load cell output to the ADS1232. Suggest me, any fine tuning in this area?
Jayaraj.A