Because of the holidays, TI E2E™ design support forum responses will be delayed from Dec. 25 through Jan. 2. Thank you for your patience.

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DAC121S101: Output state at and after power on reset.

Part Number: DAC121S101
Other Parts Discussed in Thread: DAC63001, DAC63204

Hello,

I am working to use in my design the DAC121S101 and I would like to use to control an LDO, like in design described in SBAA341A. Datasheet says that 3 power Down modes can be configured, 1K and 100K pull down and high impedance. My question is if any of them is set during and after power on before a valid write sequence in the DAC.

Regards and thanks in advance

Raúl