DAC5687: Regarding usage

Hey Higa, 

At first glance this setup looks correct to me. 2x interpolation would run the data clock at half the rate of the DAC but then running both channel A and B (I/Q) on a single bus would then double it back to be the same rate. I have not tested this exact setup however. Let me see if I can get this setup going and confirm it works for you. 

Regards, 

Matt

Hi Matt-san

Thank you for answering.

Could you please update your confirmation?

Best regards,

Higa

Hello Higa-san, 

I am in the process of writing some software to control this DAC as we do not have any software in house currently to do so. Have you been able to test the setup yourself? I would imagine it would work fine. Just want to be sure before I give a final answer. It may be another week until I have a solution working. 

Regards, 

Matt

Hi matt-san

Thank you for your kind support.

We look forward to hearing from you.

Best regards,

Higa

Hi Higa-san,

Matt will be back in the office on Wednesday, I will have him get you an update.

Regards,

Rob

Hello Hita-San, 

I was just able to get the SPI working on an old characterization board I found for this device. I'll work to get this setup working and report back shortly. 

Really appreciate your patience. Just want to be sure this setup works for you. 

Regards, 

Matt

Higa-San, 

I think I misinterpreted the mode you had stated. When you say interleave bus mode do you mean have channel A data interleaved between bus A and B? (Half data rate) or do you mean send both channel A and channel B data over just channel A (double data rate). 

Regards, 

Matt

Matt-san

"Send both channel A and channel B data over just channel A (double data rate)"

Best regards,

Higa

Matt-san

Do you have any update?

Regards,

Higa

Hi Matt-san

We are waiting for your reply.

Regards,

Higa

Hello Hita-San, 

I have been able to get the setup working with X4 interpolation but not with X2. I currently and talking to the systems engineering team trying to resolve this. I appreciate your patience. 

Regards, 

Matt

Hi Matt-san

Do you have any update?

Regards,

Higa

Hello Higa-San, 

Very sorry for the delay. It turns out the single board we have in the lab has prototype silicon on it (explaining why it doesn't work in all operation modes). The EVM is no longer available so I cannot simply order a new board. I did order some additional samples which should arrive early next week for me to solder onto the validation board I have. 

I will update you by Tuesday of next week, hopefully with a final answer. I very much appreciate your patience. 

Regards, 

Matt

Hello Hita-San, 

The new samples arrived today. I should have the board populated with good parts so I can test this use case and report out by eow. Thanks again for your patience

Regards, 

Matt