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ADS7871 information about source impedance

Other Parts Discussed in Thread: ADS7871

Hi

Since in my application it is not possible to reduce the analog input channel source impedance arbitrarily, I need some more details:

1. The Datasheet recommends to reduce CCLK, for a analog input channel source impedance greater than 2k. If I use the internal oscillator, I cannot reduce CCLK. Does it also help to increase the division factor DF, to reduce DCLK instead of CCLK?

2. Does the mentioned 2k source impedance refer to the maximum conversion frequency of 50kHz? It is unclear, under what conditions this source impedance was calculated: - What is the remaining LSB fraction that was provided and what is the ADC input series resistance?

We use a 14 bit converter and require at least 12 effective bits. Thus, I need this information for a proper design.

 

Thank you very much for any help!

Timon Meier

  • Hi Timon,

    Thanks for your interest in the ADS7871!

    It's been a while since I've looked at the ADS7871 device so I'll have to refresh the memory banks on the device specifics.  In general though, the input impedance would be dynamic based on your sampling rate.  We'll get back to you as soon as possible,

  • Hi Timon,

    Sorry for the delay here regarding your ADS7871 question.  Essentially what happens when you reduce the CCLK, you increase the acquisition time of the ADC.  Reducing the DCLK time will not have an impact on the acquisition time.  The 2K source impedance did assume full speed operation of the ADS7871.  The input MUX ON resistance is 100 ohms and settling times were calculated to 1/2LSB.

    If your sensors are going to be >2k and you cannot use an external CCLK, you might consider adding buffers between the source and the ADC.

  • Hi Tom

    Many thanks for your detailed answer. This gives me all information I need for finishing the design.