sir.
1.DAC Speed will be considered as an addition of settling time and writing speed.Or the settling time only come to play .
2.I am using fullspeed(20MHz) for writing.then one bit updation takes 0.05uS so all 512 steps(512*16*0.05=409.6us) any delay between two write, is this true. Then (409.6+settling time)=409.6+208=617.6us(time) is this calculation right for achieving full scale ramp.
3.is it needed to go in the above way or i have to consider only the seettling time only and go ahead.
4.what is the difference between fast and slow mode(technical other than speed).
regards.
Anoop