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ADC124S021: Chip Select Permanently Asserted (Tied Low)

Mike N
Prodigy 90 points
Part Number: ADC124S021

What's up TI,

As stated is it OK to keep CS_ grounded permanently and then control single conversions by bursts of SCLK?

The SCLK frequency would be per your spec during the burst, but there would be long periods of SCLK idle when I don't need to convert.

All the while, CS_ remains low.  Any problems with this method, and would the power down still work?

  • +1
    TI__Expert 8545 points

    Hi Mike,

    Thank you for your question!

    Grounding the nCS pin should be fine for this device. However, it is good practice to bring nCS high once conversions needed are complete to help fix any clocking miscounts or mismatch between SDI and clock. 

    Even when nCS is held low, the device will still enter power-down mode between the 16th falling edge of a conversion and the 1st falling edge of the subsequent conversion.

    I hope this helps!

    Best,

    Samiha

  • +1 in reply to Samiha Sharif
    Prodigy 90 points

    Thank you Samiha,

    Suppose there was a clock miscount as you describe.  Is there any timeout on the SCLK line by which an interval of clock idle would also reset the adc and resolve the clock miscount such that further conversions be done?  Once again this is while nCS remains permanently grounded.

    MikeN

  • 0 in reply to Mike N
    TI__Expert 8545 points

    Hi Mike,

    There is no timeout feature on this device. If the SCLK edge is somehow missed between bursts, nCS would need to be toggled again. nCS may also need to be toggled at least once in the very beginning to ensure the tCSU and tCLH timing specifications are observed to ensure proper device function:

    Best,

    Samiha