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ADC12D1600: How 1:4 DES mode can be realized

Ryuuichi machida
Guru 11915 points
Part Number: ADC12D1600
Other Parts Discussed in Thread: ADC12D1620QML-SP,

Hello,

I would like you to confirm input condition of DESI and DESQ mode.

* According to datasheet, it seems that only "1:1 demux" and "1:4 mux" can be available on DES mode.


However, I understand that case of DESI and DESQ mode use only one ADC.
Therefore, I think that "1:2 mux" mode also can be available in above two mode. However, you describe only "1:4 mux" for multiplex mode of DES mode.
Is my understanding that user can realize "1:4 mux" even if they choose "DESI" and "DESQ" correct ?

Best Regards,

  • 0
    TI__Mastermind 20541 points

    Hi, 

    In DESI or DESQ mode only ONE input  can be used.  I channel and Q channel respectively. But internal to device both ADCs are used. As a result the only 1:4 demux or 1:1 demux mode is available. 1:2 demux mode is not available. 

    Regards,

    Neeraj

  • 0 in reply to Neeraj Gill
    Guru 11915 points

    Hello,

    Thank you for your reply.
    I understood that we can use 1:4 demux mode for DESI and DESQ.
    By the way, difference DESI, DESQ and DESIQ, DESCLKIQ are bandwidth and SFDR.

    However, it seems that there is no bandwidth spec for above each mode.

    Q1. Could you please give me available bandwidth for above modes ?
    Q2. We consider to use ADC12D1620QML-SP for the feature.
           This device also does not have bandwidth spec for above modes.
            Could you please give me available bandwidth for above modes as well ?

    BR,

  • 0 in reply to Ryuuichi machida
    Guru 11915 points

    Hello,

    Could you please give your feedback ?

    Best Regards,

  • 0 in reply to Ryuuichi machida
    TI__Mastermind 20541 points

    Hi 

    Here is the plot from ADC12D1620QML datasheet. 

    Regards,

    Neeraj

  • 0 in reply to Neeraj Gill
    Guru 11915 points

    Hello,

    What I want you to ask is maximum "fclk" frequency and minimum "flck" frequency for each mode(DESI, DESQ, DESIQ, DESCLKIQ and non-DES).
    But I found following information.



    I thought that this spec is same as ADC12D1600 and ADC12D1620QML at first, but I noticed that this spec was different.

    By the way, why did you plot over 1600Msps for non-LSPSM and 3200Msps for DES mode ?
    Does it show not available actual input signal but show effect of the impedance of input line ?
      
    BR,

  • +1 in reply to Ryuuichi machida
    TI__Mastermind 20541 points

    Hi 

    When using Non-LSPSM mode, max clock for DESI, DESQ,DESIQ,DESCLKIQ and non-DES is 1.6GHz. Please note in all DES mode sampling rate is double of clock rate. For example when 1.6GHz clock the sampling frequency will be 3.2Gsps. Where as in Non-DES mode max clock rate of 1.6GHz corresponds to max sampling rate of 1.6Gsps

    When using LSPSM mode max clock rate is 800MHz, which means in DES modes max sampling frequency is 1.6Gsps and 800Msps for Non-Des mode. 

    For min clock. For DES mode it is 250MHz and 200MHz for Non-DES mode. 

    By the way, why did you plot over 1600Msps for non-LSPSM and 3200Msps for DES mode ?

    As mentioned above for Max sample rate for Non-DES mode is 1600Msps and 3200Msps for DES modes. 

    Does it show not available actual input signal but show effect of the impedance of input line ?

    The plot is showing frequency response( passband flatness or analog input bandwidth).

    Regards,

    Neeraj

  • 0 in reply to Neeraj Gill
    Guru 11915 points

    Understood.

    BR,