ADC09QJ1300: LVDS connections (SYSREF, TMSTP)

Part Number: ADC09QJ1300

We are interfacing the device from an FPGA. The LVDS outputs of the FPGA are spec'd at normal LVDS levels, with a minimum output differential of 274mV. The ADC datasheet specifies a minimum differential input voltage is 400mV, which LVDS and the FPGA cannot guarantee. 

Is there a recommended interface conversion device (such as LVDS to LVPECL)?

Thanks!