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ADS122C04:AD data value hunting occurrence according to SPS.

YUEUN JEONG
Prodigy 20 points

Part Number: ADS122C04

Below is my circuit diagram,

The logic is very good at SPS 20.

But when I try to set SPS 45, the output value is not stable.

Below is my data.

1) SPS 20

  2) SPS 45

Below is my process setting value. (processor : Atmega328P)

Register 0 = 0x08                MUX[3.0]=b0000(+:AIN0,-:AIN1), GAIN=b100(x16), PGA=b0(Enable)

Register 1 = 0x20                DR[2.0]=b001(Data Rate:45sps), MODE=b0(Normal), CM=b0(Single Shot), VREF=b00(2.048V), TS=0(disable) 

Register 2 = 0x84                DRDY=b1, CNBT:b0, CRC:b00, BCS:b0, IDAC=b100(250uA) 

Register 3 = 0xB8                I1MUX[2.0]=b101(IDAC1=REFP), I2MUX[2.0]=b110(IDAC2=REFN), reserved=b00 

It's stable if you set it up with SPS 20
If we set it with SPS 45, it is difficult to use DATA due to the severe error value.

According to DATA SHEET's table, it can be used from 20SPS to 2000SPS
This heavy hunting is a problem for data reliability.

Is it a circuit problem or a register setting problem?

Or is it something else?

  • 0
    TI__Guru** 113765 points

    Hi Yueun Jeong,

    Welcome to the E2E forum!  It is difficult to say what might be happening but the first thing I would look at is power line-cycle pickup.  The ADS122C04 at 20sps has a special FIR filter for limiting 50/60 Hz noise pickup.  I would suggest going to continuous mode and collecting data in consecutive and contiguous way so that no conversion data samples are missing.  When plotting that data you should see if there is an AC type noise present in your system.  If so, you will need to filter the noise before entering the ADC or the PGA will just gain up the noise.

    Best regards,

    Bob B