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ADS52J90: Load Capacitor Selection

Rachel Johnson
Prodigy 45 points
Part Number: ADS52J90

Hello, 

I am working with the ADS52J90 and connecting the LVDS to a SoM on another board.  I noticed the datasheet specifies a 4pF load capacitor between each output and ground. I am wondering where this value was derived from? Additionally, should this capacitor be placed as close as possible to the ADS52J90 LVDS driver or closer to the SoM? 

Thanks.

  • 0
    TI__Expert 4920 points

    Hi Rachel, 

    The 4pF load capacitor was just assumed as a typical trace-load during the LVDS characterization and hence mentioned in the spec table. 

    However, it is not recommended to have such a load capacitance on the LVDS traces. You just need to end-terminate the differential traces with a 100-ohm as shown below. This 100 ohm should be inside (or as close as possible to) your SoC or FPGA. 

    Thanks, 

    Karthik