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DAC8775: Regarding CRC and Power Loss Indication

Part Number: DAC8775


Hi team,

We need a confirmation for an observation that we had regarding the Readback operation from the DAC8775.

1. We intend to readback the contents from the Device ID register (address 0x11) with CRC enabled. Whenever the CRC is enabled (CREN=1), and when we do a readback of any Register, we receive Device ID data content + CRC + Device ID register address which is ORed with 0x80h [0x11h || 0x80h = 0x91h].

In the Readback operation, does the DAC8775 also send the additional Device ID register address? The datasheet does not specify that the readback response from the DAC will also receive the register address OR with 0x80h. 

 

2. Using the DAC8775 functionality, can recommend a method to detect whether the DAC is being powered ON or if the DAC has lost power ?

  • Hi,

    Let me check this and I will respond back soon.

    Thanks,
    Lucas

  • PY,

    1. I haven't heard of this issue before. Can the customer show an example of this readback of this register with the CRC and the OR-ing of the MSB? I'd like to see a scope shot of this communication, but a digital readback might be good enough. The EVM doesn't have CRC capability, so we would need to find a different controller to test this.

    2. The DAC8775 doesn't have much diagnostic capability, so I don't have a method to detect if the DAC is powered on. My first recommendation would be to use some sort of external ADC to measure the supplies or DAC output. One thing that might be interesting to try would be to power down the analog supplies to see if the registers read back normally. I would especially be interested in looking at the FAULT CHANNEL X bits in the 0x0B register. I'm not sure if this would trigger a fault, but it would be worth checking.

    Joseph Wu

  • PY,

    Also, is the CRC read issue a problem with any other registers? I would have them read back other registers just to check. They could program different values for the DAC CODE and read them back with CRC just to check this.

    Joseph Wu

  • Hi Joseph, 

    I'm taking over this thread from PY. 

    Customer had confirmed that there is no CRC issue on the register. Below is an example of what they had done :

    Sent to DAC                  [Reg Addr|0x80h] [00][00][CRC]   followed by      [NOP Command]

    Received from DAC     [Reg Addr|0x80h][Register Data][CRC]

    They wanted to confirm that if the DAC is sending the Read register value ORed with 080h which is highlighted in blue in the receive packet when they send a read command to the DAC.

    Can you help comment the format of the readback from DAC? Is it in the format we suggest in above?

    Thanks,

    Christina 

  • Hi Christina,

    Yes, that is correct. The datasheet implies that the readback will be the entire SPI frame, but doesn't show a specific example.

    Here is an example that I just did with the DAC8775EVM, except it doesn't have CRC bits.
    If there were CRC bits, as you posted, they would act as the 4th byte of each message.

    This was reading from the data register, which was set to 0x1234.
    Since the previous command was writing to the data register, you can see the message buffer on the first frame of the MISO line.



    Let me know if there are any other questions or issues!

    Thanks,
    Lucas

  • Christina,

    I'm not completely sure that we've understood the question correctly. Can you provide a scope or a logic analyzer shot of the communication that has the data read? I would want to see the exact bits coming out of the device for the read transaction. Also, you mention the example is for the NOP command, but does an error occur for any other data reads? Can you have them take a reading with the CRC for a different register (one that has a non-zero value)?

    Joseph Wu