• State TI Thinks Resolved
  • Locked Locked
  • Replies 2 replies
  • Answers 1 answer
  • Subscribers 46 subscribers
  • Views 261 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LM98640QML-SP: Inquiries about device settings

JH Shin
Guru 10970 points
Part Number: LM98640QML-SP

Hello,

My customer has some questions about the LM98640QML-SP settings.

1. When using Sample&Hold Mode as Disabled and CDS Mode as Enable, does the Reference Buffer Power Level of Sample&Hold Register (0x06) affect the performance of CDS Mode?

2. When using Sample&Hold mode as disabled and CDS mode as enabled, can they use Ref Buf PowerDown in the Power Down Control Register as Disable?

3. In the datasheet, the reference signal (OSx+) is recommended to connect ByPass Cap 100nF in CDS mode. When not in use, can they power down the Ref Buffer to reduce current consumption?

Thank you.

JH

  • 0
    Guru 10970 points

    Hello Expert,

    Are there any updates for the customer's inquiries?

    Thanks,

    JH

  • 0 in reply to JH Shin
    TI__Expert 4890 points

    Hi, 

    1. Yes, Reference Buffer Power Level affects the performance of CDS mode (Sample & Hold Mode as Disabled and CDS Mode as Enabled). Choose the correct one based on Finclk. 

    2. No, if you are using a channel in the CDS mode, the corresponding reference buffers cannot be powered down. In CDS mode, the reference buffer samples the reference signal from OSx- pin as shown below and holds it for the subsequent circuits. 

    3. How is this question different than question 2? If a particular channel is not being used in the CDS mode, then all the blocks relevant to that channel can be powered down (reference buffer, ADC etc.)

    Thanks, 

    Karthik