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DAC37J84: DAC37j84 termination

Part Number: DAC37J84
Other Parts Discussed in Thread: DAC38J84, LMK04828

Hi, Support

      Have couple question regarding the DAC37j84 datasheet, can you please help with it??

1.  The DACCLKP/N and SYSREFP/N internal termination.  from the datasheet, it shows 100 Ohm internal termination.  Is this default hw 100 ohm there or need to config it?? I don't see it in the register map to config it.

      The reason for the ask is that when I sent PLL clock chip as LVPECL1600, the input differential voltage measured at the DACCLKP/N is about 1.7V.  when set as LVPECL1600, it suppose to be about 800mV instead. 

      can you please help understand why? is it possible the termination is no on??

2.  The analog output.  The output compliance range is max 0.6V.  This mean that if I config the full scale current output is 20mA and the output load resistor should be 25 Ohm.  But if I place a higher value resistor, will it cause any damage of the chip or the output will just clamp to the max 0.6V??

thank you.

Li

      

  • Hi Li,

    1.  The DACCLKP/N and SYSREFP/N internal termination.  from the datasheet, it shows 100 Ohm internal termination.  Is this default hw 100 ohm there or need to config it?? I don't see it in the register map to config it.

    No configuration is needed. The internal 100ohm is integrated into the silicon clock and sysref input circuit.

        The reason for the ask is that when I sent PLL clock chip as LVPECL1600, the input differential voltage measured at the DACCLKP/N is about 1.7V.  when set as LVPECL1600, it suppose to be about 800mV instead. 

    Could you please clarify again on the differences between the two output set up? I see them both as LVPECL1600

    2.  The analog output.  The output compliance range is max 0.6V.  This mean that if I config the full scale current output is 20mA and the output load resistor should be 25 Ohm.  But if I place a higher value resistor, will it cause any damage of the chip or the output will just clamp to the max 0.6V??

    Please refer to the app note below for analog interface for the DAC38j84

    https://www.ti.com/lit/pdf/slua647

  • Hi, Kang

         I config the two clocks to LVPECL1600.  And measured with differential probe at C76 and C77 close to DAC side.  The measured voltage is about 1.7V.  I was expecting a 760mV signal because the DAC datasheet shows need a 800mV clocks.  can you please help understand where possible went wrong??

    thanks

    Li

  • Hi Li,

    I have asked our clocking team to look into this for you.

  • thank you and looking forward or your email.

    thanks

    Li

  • Hi Li, 

    Can you give a few more details on how you are probing the signal? If you are testing differentially with one probe at C76 and the other at C77, then it is expected to measure around 1.5 V to 1.7V since you are measuring VSS instead of VOD. From the LMK04828 datasheet, with 1600 mVpp LVPECL VOD is typically around 760 mV with a 50 Ohm termination.

    Most likely this is fine, I believe the voltage requirements of the DAC LVPECL inputs are referring to VOD since the units are in peak-to-peak voltage, but maybe Kang can confirm this. 

    Regards, 

    Connor