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ADS1256: How to Properly Design the ADS1256 Circuit and Choose Decoupling Capacitors?

Part Number: ADS1256
Other Parts Discussed in Thread: REF6025

This is the schematic I designed. Are there any areas that appear to be unreasonable or in need of correction?

My signal ranges from 0 to 20 Hz with a sampling rate of 200 Hz.

The following is the circuit diagram provided in the ADS1256 datasheet. I would like to know why there are so many decoupling capacitors connected to the VREF pin and their purpose.

  • Hi LEO_0916,

    Some thoughts about your schematic:

    • You should consider adding pull-ups on RESET and PWDN to DVDD to ensure that the ADC is in a known state at powerup
    • The ADS1256 VREF inputs are not buffered. You should consider adding a buffer to the output of the REF5025, or use a buffered reference such as REF6025
    • You do not need all of the capacitors on the VREF inputs. 100nF across the inputs should be sufficient
    • The REF5025 recommends a 1uF cap between the NR pin and ground, as well as an optional ESR resistor + cap between VOUT and ground

    -Bryan

  • Thank you very much for your assistance. I have made modifications to the circuit, please help me check if it is correct. By the way, I only need external control for the RESET pin, so is it sufficient to add a pull-up resistor to the RESET pin?

  • Hi LEO_0916,

    This looks like you made all of the changes we recommended, so that is a good start

    Regarding your question: even if you do not connect anything to the SYNC/PWDN pin, you can still issue the SYNC command to synchronize the conversion. So that functionality is still available to you, just by command and not using the pin.

    -Bryan

  • I get it!! Thank you so much for your help

  • HI LEO_0916,

    I am glad we could help you resolve your issue quickly

    -Bryan