Hi,
I have followed the section 10.1 Power Sequence of the datasheet to initialize the DAC device. I checked for any errors or alarm registers triggered and there were none.
Next, I ran an I/O pattern check by enabling bit 2 of Config1 and no values stayed '1' after I cleared Config8. I changed values in Config9 thru Config16 to force trigger errors to pop up in Config8 and I can confirm that the I/O pattern is working as intended.
After that, I turned off bit 2 of Config1, yet I am still not getting anything from IOUTA or IOUTB (hooked up through adapter into O-scope).
My DAC Clock is ~500 MHz and my DATA Clock is ~250 MHz.
I also have my Frame signal triggered once as a pulse after setting up as per step 7 of section 10.1 on the datasheet. clkdiv_sync_ena (config18, bit 1) was disabled shortly as well.
Please advise and let me know if any additional information is required!
Thanks,
Jason
