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ADS52J90: Configuring ADS52J90 for Non-Continuous Data Digitization in 32-Channel Mode

Harsha Manjunath
Prodigy 10 points

Part Number: ADS52J90

Hello,

I am attempting to utilize the ADS52J90 in a 32-channel mode to digitize 32 distinct analog values coming from a test chip. The data received from the test chip is not continuous in nature. Whenever the data is ready, the test chip will assert a READY signal, indicating its readiness to transmit the data, and I require the ADS52J90 to digitize it. The ADS52J90 should cease digitizing when the READY signal is deasserted.

Considering the aforementioned requirements, kindly advise on the configuration of the ADS52J90 to support my application. If the ADS52J90 cannot support this mode of operation, please suggest an alternative part that can.

Please feel free to reach out if you have any questions. Thank you.

  • 0
    TI__Expert 4731 points

    Hi,

    In ADS52J90, there is no internal memory that can store digitized data. So ADS52J90 will digitize and send the data over LVDS lane to FPGA. 

    Another way to handle this is giving ready signal to FPGA. You must need FPGA here to capture data from LVDS interface. So whenever you receive ready signal then in FPGA you can store the digitized data. Will that work for you?

    Regards,

    Shabbir

  • 0 in reply to Shabbir Amjhera Wala
    Prodigy 10 points

    HI,

    Thanks for your response.

    Sorry, probably my question was not clear. I already have FPGA that will capture ADC output -- that is not an issue.

    In my application, the analog signal is coming from 32 sensors and I need to sample 90 times every 100us (just an example). The analog sensor takes 10us to settle down and then transmits 90 analog samples and this pattern repeats (i.e., 10us settling -> 90us sampling -> 10us settling -> 90us sampling and so on).  Is it possible to configure ADS52J90  ADC to support this mode of operation? 

    Please let me know if you have additional questions. Thanks

  • 0 in reply to Harsha Manjunath
    TI__Expert 4731 points

    Hi,

    Yes I could understand your requirement. In ADS52J90, there is no mode to store samples and retrieve later. ADC support continuous conversion. I was trying to say that you can capture continuous data in FPGA and whichever samples you need can be stored in FPGA and other samples can be discarded. Isnt it possible?

    Thanks!

    Regards,

    Shabbir