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ADS1282: Mux settling time

Silvia Fattori
Prodigy 10 points

Part Number: ADS1282

Hello, 

I am currently using the ADS1282 in my design in pulse mode. The design is composed of two external multiplexers, which provide the input voltage to the ADC for both channel 1 and channel 2. During my acquisition cycle, I perform a continuous switch of the external mux in order to set the data to be sampled.

1) If I use the SINC filter only, how long do I need to wait from the ADC internal mux selection and the first valid sample? Does this delay need to be applied also in case of external mux switch when interal mux keeps fixed?

2) How the delays change in case of using SINC+FIR mode?

Thank you 

  • +1
    TI__Guru 51270 points

    Hello Silvia,

    Welcome to the TI E2E community.

    1.  Any time an internal or external mux is changed, you should resync the ADC by asserting the SYNC pin or sending the SYNC command.  Using only the SINC filter, the total time will be approximately 5.5 data rate periods using an 8ksps data rate (5.5*1/8k=0.69ms); the exact time is specified in table 35 of the datasheet for the different data rates.  

    2.  If using the SINC+FIR filter, the delay times are much higher due to the FIR filter.  The approximate time will be 63 data rate periods.  If using 4ksps, then total approximate time will be 1/4k*63=15.75ms.  The exact time will be 62.98046875/fDATA + 468/fCLK.  Calculating the exact time will be 62.98046875/4000+468/4096000 = 15.86ms.

    Regards,
    Keith Nicholas
    Precision ADC Applications

  • 0 in reply to Keith Nicholas
    Prodigy 10 points

    Hello Keith, 

    thank you for the answer. 

    1. Is there an advantage in asserting the SYNC command instead of just waiting the time specified in the datasheet after an external mux switch? 

    2. That's clear.

    3. I inherited a design in which the time constraints are too tight for the usage of SINC+FIR filter. The disadvantage I see in using the SINC filter only is that the noise performances are worse, causing the accuracy of the measurements to lower. Do you think that I can recover the noise performances with a digital processing of the acquired data, consisting of oversampling and configuring the ADC with the highest DR that allows me to stay in the constraints? I was thinking to acquire 8 or 16 samples of the same input, using DR = 64.

    4. I have also another doubt. Would you suggest to control the ADC conversion in continous mode or in pulse mode. The only difference that I can see is that in continuous mode I can save the time needed for the read request I have to place before acquiring every sample. Is that right? 

    Regards, 

    Silvia

  • +1 in reply to Silvia Fattori
    TI__Guru 51270 points

    Hello Silvia,

    1.  If you assert the SYNC pin, then /DRDY will be held high until the new data is fully settled and ready to read from the device.  If you do not use this mode, that is O.K., but you will need to keep track of how many data rate periods to wait before new data is available.  The /DRDY will keep asserting at the data-rate in this case.

    2.  O.K.

    3.  Yes, this approach will work.  However, I would suggest running the SYNC filter at the highest OSR possible (lowest data rate), and then average (basically a SINC1 filter) as many fully settled readings as possible to get similar noise performance as the SINC+FIR.  The resulting response would be a SINC5+SINC1, where the SINC5 is the internal ADS1282 filter, and the SINC1 is the averaging filter inside the host processor.

    4.  Similar to question 1, you can use continuous mode, but you will need to keep track of the number of data rate cycles after changing the multiplexer in your host processor.  If this is 'easier' than sending a SYNC command or asserting the SYNC pin, then this approach will work well.

    Regards,
    Keith

  • 0 in reply to Keith Nicholas
    Prodigy 10 points

    Hello Keith, 

    thanks a lot for the explanations, you solved my doubts. 

    Regards, 

    Silvia