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ADC09QJ1300EVM: EVM test issue

Hailey Chen
Expert 3600 points

Other Parts Discussed in Thread: TSW14J58EVM, LMK00304

Hi，experts：

   When I use TSW14J58Evm and ADS09QJ1300EVM，setting ADS09QJ1300 on board 50Mhz clock and sampling rate 1300Mhz，use jmode3， has programm clock and adc pll，and then choose jmode3 mode in TSW14J58，but it always shows adc_pll_lock related issue，do you have met similar issue before，could you help give some suggetions on how to debug on this？ i am wondering is it related to the wrong ini files？

  • 0
    TI__Expert 6440 points

    Hello Hailey,

    Can you clarify some things for me, 

    How are you programming the ADC, is it through the device GUI? Are the following jumpers in the correct positions

    • OSCON - J15 installed
    • GBTSEL - J25 - uninstalled
    • PLLEN - J23 - installed
    • REF_SE - J26 - installed

    After programming the ADC can you check and verify if the CPLL is locking, in the GUI this can be seen in tab ADC PLL, after clicking "Check PLL Status" button the red box should turn green indicating the PLL is locked. If this is not the case please ensure that the 50 MHz reference is reaching the ADC and is a clean signal.

    Finally, if all of this looks good can you check the output of the LMK00304 to the FMC connector and verify it is 507.8125 MHz 

    Best,

    Eric Kleckner