Hello,
The datasheet is mentioning “During the first 3 cycles of SCLK, the ADC is in the track mode, acquiring the input voltage. For the next 13 SCLK cycles the conversion is accomplished and the data is clocked out. Here, the data clocked out is the converted data from the held value in the same frame (N), or from the held value in the previous frame (N-1)?
Best regards,
K.Hirano
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