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dac7821

Other Parts Discussed in Thread: DAC7821

Hi.

5775.dac.ZIP

I designed a board of DAC7821 as shown in Figure 26 of dac7821.pdf.

I get strange outputs which I can't understand .

When I dial the word "111111111111" I get the pic photo.jpg .

When I dial the word "011111111111" I get the pic photo1.jpg .

When I dial the word "001111111111" I get the pic photo2.jpg .

Photo3.jpg shows the /CS input .

The output is the same for different CS width and freq' .

I have double checked all input to the dac7821.

 

Please Advise.

 

Ephraim Oved.

 

 

  • Hi Ephraim,

    A couple questions -

    Is there any specific reason why some of the pictures of the oscilloscope were taken upsidedown or was it just the way the camera was angled?

    Do you have a transimpedance amplifier at the output of this MDAC in order to generate an output voltage? If not, you are going to need to have one to isolate the resistor string from the output load and create a voltage from the current. If you are connecting the Iout line directly into an output load resistance, then you are going to be creating a voltage divider between the R2R internal resistor string inside of the DAC and the load resistance.

    If you could attach a little bit of schematic it would help me see your test setup.

    Regards,

    Tony Calabria

     

     

  • Hi.

    The pictures were taken by Ipad2 .

    I don't have a transimpedance amplifier at the output,  I thought it is the job of the op277 .

    I just copied the example from the TI'pdf ,

    If a transimpedance amplifier is needed , A schematics will be most welcomed.

    process (rst,clocks40)
    begin
      if rst = '1' then     
      cs <= "111111111111";
      dac <= "111111111111";
      cnt <= "000000000000";
       elsif rising_edge(clocks40) then
       cnt <= cnt + '1';
       dac <= "001111111111";--cnt;
      case cnt(2 downto 1)  is
       when "00" => cs <= "111111101111";
       when "01" => cs <= "111111111111";      
       when others =>  --cs <= "111111111111";
    --         dac <= "111111111111";
      end case;
     end if;  --rising_edge(clk)
    end process;

    The data bus and ce inputs are driven by CPLD . See trhe code.

    The oscilloscope leads are attached directly on the output at TP1.

    0654.dac.pdf

    I get the same result if I test the output bbefore the 50 Ohm resistor .

    If there is a voltage divider as you mentioned, Then why the ouput is in ramp state ?.

    Any way I will build a second board and see what happen.

     

    Please Advise.