Hello Team,
We have two DAC's connected to same SPI lines of MCU. Our Design is similar to the design mentioned in DAC8760 data sheet (i.e. we use gate to select and supply clock to each DAC's). In our application we need to perform DAC8760 power cut (both DAC's) and restore power to DAC's then Init DAC, Set CRC, Write output and Write Control register for each DAC one after another in For loop.
What we observe is that when DAC is powered back after cutting it's power supply we initialize DAC (0x560001), set CRC for DAC1 (0x570008) and set CRC for DAC 2 (0x570008).
Write DAC Data register (0x01xxxx) for DAC1, Write to Control register (0x55100x) for DAC1.
Write DAC Data register (0x01xxxx) for DAC2, Write to Control register (0x55100x) for DAC2.
We ran endurance testing and saw that after some random cycle CRC bit in the Configuration is not set for DAC1 every time due to which 4 byte frames sent during write to DAC's are blocked.
Generally how much time will it take for DAC8760 to set CRC bit in Configuration register?
We are setting up CRC bit in a for loop for both DAC's, will there be any impact for CRC set because of this loop?
CRC setting part code looks something like this,
for (uint8_t i = 0; i<2; i++)
{
//Setting CRC bit by writing 0x57008; (3 bytes SPI frame)
}
Best regards,
Naveen
