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ADS131M03: Reading Multiple Registers Issue

Part Number: ADS131M03
Other Parts Discussed in Thread: ADS131M04EVM

Hello,

I'm using the ADS131M03 with no problem on all of its features except for "Reading Multiple Registers" command:

A) If I do a repeated single register "0" read (i.e. 0xA000) I got every time the correct requested register value plus 3 channels values plus CRC as expected.

B) If I do a repeated multiple registers "0, 1, 2" read (i.e. 0xA002) I got:

one time the ack 0xE002 plus the three requested register values plus CRC as expected,

next time the STATUS register value plus 3 channels values plus CRC as I was sending a NULL command,

then the ack 0xE002 plus the three requested register values plus CRC as expected,

next the STATUS register value plus 3 channels values plus CRC as I was sending a NULL command,

A and B uses exactly the same code and flow; new command is sent as soon as previous transaction is ended;
Communication uses CS;
MODE = 0x2111;

Every transaction is fixed in size and is made of nr 5 x 24bit.

I've carrefully read the manual and I've not indication of cases (except from wrong command) when is expected to receive STATUS instead response.

Can you please help?
At moment I'm reading registers "one a time", everithing works, but is not efficient.

Thanks and Best Regards,

Andrea.

ADDENDUM: Here a full TX-RX sequence:

SPI_DBG_.pdf

  • Hi ,

    I will get it back to you tomorrow.

    BR,

    Dale

  • Hi Andrea,

    I would double check with you about your steps, please let me know if my understanding is correct:

    Frame 1: 

    - DIN:  0xA002 was sent to ADC for reading 3 registers

    Frame 2: 

    - DIN:  NULL was sent to ADC

    - DOUT:  0xE002 plus the three requested register values plus CRC as expected

     Frame 3:

     - DIN:  NULL commands was sent to ADC

    - DOUT:  STATUS register value plus 3 channels values plus CRC  were received

    Frame 4:  

    - DIN:  what did you send to the ADC?

    - DOUT:  ack 0xE002 plus the three requested register values plus CRC as expected

    Frame 5:

     - DIN: NULL command was sent to ADC

    - DOUT:   STATUS register value plus 3 channels values plus CRC were received

    Which step or data was not expected by you? It would be good if you could share your timing plot (/CS,SCLK,DIN and DOUT) captured with logic analyzer.

    Regards,

    Dale

  • Hi Dale,

    I'm unable to acquire signals now; I'll try to do it asap.

    No my sequence (now reduced and repeated to same 3 registers just for test) is the following:

    - IRQ DRDY

    - Frame 1:
    -- DIN 0xA00200, 0x000000, 0x000000, 0x000000, 0x000000 (for reading previous requested STATUS and DATA)
    -- DOUT 0x010700, 0x0022E0, 0xFFFFBF, 0x3B1F57, 0x"CRC" (correct STATUS and data perviously requested)

    - Frame 2:
    -- DIN 0xA00200, 0x000000, 0x000000, 0x000000, 0x000000 (for reading previous requested Registers 0, 1, 2 and request next 3 registers)
    -- DOUT 0xE00200, 0x230500, 0x010000, 0x211100, 0x"CRC" (correct values of 3 perviously requested registers)

    - Frame 3:
    -- DIN 0xA00200, 0x000000, 0x000000, 0x000000, 0x000000 (for reading previous requested Registers 0, 1, 2 and request next 3 registers)
    -- DOUT 0x010000, 0x0022E0, 0xFFFFBF, 0x3B1F57, 0x"CRC" (wrongly get STATUS and data instead of 3 perviously requested registers)

    - Frame 4:
    -- DIN 0xA00200, 0x000000, 0x000000, 0x000000, 0x000000 (for reading previous requested Registers 0, 1, 2 and request next 3 registers)
    -- DOUT 0xE00200, 0x230500, 0x010000, 0x211100, 0x"CRC" (correct values of 3 perviously requested registers)

    - Frame 5:
    -- DIN 0xA00200, 0x000000, 0x000000, 0x000000, 0x000000 (for reading previous requested Registers 0, 1, 2 and request next 3 registers)
    -- DOUT 0x010000, 0x0022E0, 0xFFFFBF, 0x3B1F57, 0x"CRC" (wrongly get STATUS and data instead of 3 perviously requested registers)

    ...
    ...

    If I do the same but reading one register a time:

    -- DIN 0xA00000, 0x000000, 0x000000, 0x000000, 0x000000

    I get the register Value (followed by data values) for every request, no STATUS is reported and works well:

    -- DOUT 0x230500, 0x0022E0, 0xFFFFBF, 0x3B1F57, 0x"CRC" (correct values of 3 perviously requested registers)

     

    Any Idea of whst is wrong on Reading Multiple Registers?

    Thanks and Best Regards,

    Andrea.

  • Hi Andrea Borghi,

    Dale is out of the office at the moment, we will respond to you mid next week when he returns

    Thanks for your patience

    -Bryan

  • Hi Dale, I've just added to the post the full sequence in a pdf file.

    Best Regards,

    Andrea.

  • Hi Hi Andrea,

    Thank you for your patience.

    According to the ADS131M0x data sheet, the register data will be shifted out from the ADC in next frame, so you should not keep sending RREG command in every frame. Below is the timing I just tested and captured on ADS131M04EVM which is a 4-ch ADC in the same ADC family. The command (0xA082) to read 3 registers starting from address=01h was sent to the ADC in the 1st frame, then NULL (no operation) commands were sent out in the 2nd frame. As you can see from the timing, the correct register data were received in the 2nd frame. This timing was continuously repeated for 4 times for test purpose and no any issue was observed, the data of three registers received in the 2nd frame were always correct. You should be able to get a correct response from the ADC as long as you use the same timing.

    Regards,

    Dale

  • Hi Dale,

    Thank you for your analisis!

    This will confirm what I've seen: consecutive RREG cant' be used, the ADS will ignore the second RREG and replay as NULL command instead.

    This aspect sould be clearly written on datasheet; it is not related to when new data is it available for shift register, the second command is always ignored and STATUS with CHANNELS DATA will be supplied instead, even if there is no new data (DRDY0,1,2 on STATUS are at "0").  

    Thanks Again.

    Best Regards,

    Andrea

  • Hi Andrea,

    Since the ADC will shift out the data of registers in the 2nd frame, it will think your each frame is the 1st frame if you keep sending the RREG command to the ADC, so the 2nd frame without a RREG command is expected for the ADC to shifted out the data. We will try to clarify it in next revision of the datasheet.

    Thanks&Best regards,

    Dale

  • Thanks, now is it clear.

    Best Regards,

    Andrea