Other Parts Discussed in Thread: AFE4960
Hello,
I am using AFE49I30 with SFH7072. For PPG data collection used two RED and IR LEDs. In the attachment I shared C file to confirm is it correct configuration or not. Configured FIFO to get the reading of RED_AC, IR_AC, RED_DC, IR_DC
Configuration:
1. 128 kHz internal oscillator
2. REG_NUMAV = 1
3. REG_DEC1_FACTOR, REG_DEC2_FACTOR, REG_DEC3_FACTOR and REG_DEC4_FACTOR set to 3 for averaging the 16 samples. (Register 0x96)
4. REG_PRPCT (Register 0x1D) = The PRF timer count value set to 0xA0 [Decimal 160]
If I am using configure register 0x96 to 0x004444 than I am getting 25Hz sampling rate.
As my understanding if configure register 0x96 to 0x003333 than I should get 50Hz sampling rate but in this case I getting 40Hz sampling rate. Please correct me if I am doing wrong configuration or calculation.
Thanks
#define AFE49I30_ADDR (0x5B<<1)
#define AFE49I30_PAGE_SELECT (0x01)
#define AFE49I30_TIMER_ENGINE_REG (0x1D)
#define AFE49I30_FIFO_CONFIG_REG (0x00)
#define AFE49I30_FIFO_SAMPLE_COUNT_REG (0x6D)
#define AFE49I30_FIFO_DATA_REG (0xFF)
#define AFE49I30_MAX_FIFO_SAMPLE (128)
#define AFE49I30_PPG_FIFO_RDY_CNT (12)
//==============================================================================
/**
* @brief getting points from a chip
* @param device
*/
static void AFE49I30_ReadPPG(AFE49I30_ControlT* device)
{
uint32_t rx_buffer = 0;
bool ignore_rx_buff = false;
AFE49I30_GetRegValue(&device->Driver, AFE49I30_FIFO_SAMPLE_COUNT_REG, &rx_buffer);
device->FifoSamplesCount = ((rx_buffer & 0xff) + 1) / 4;
if(rx_buffer > 128)
{
ignore_rx_buff = true;
}
for (uint16_t samples_count = 0; samples_count < device->FifoSamplesCount; samples_count++)
{
AFE49I30_PPG_ValueT value;
AFE49I30_GetRegValue(&device->Driver, AFE49I30_FIFO_DATA_REG, &device->FifoData);
value.RED_AC = device->FifoData;
AFE49I30_GetRegValue(&device->Driver, AFE49I30_FIFO_DATA_REG, &device->FifoData);
value.IR_AC = device->FifoData;
AFE49I30_GetRegValue(&device->Driver, AFE49I30_FIFO_DATA_REG, &device->FifoData);
value.RED_DC = device->FifoData;
AFE49I30_GetRegValue(&device->Driver, AFE49I30_FIFO_DATA_REG, &device->FifoData);
value.IR_DC = device->FifoData;
AFE49I30_PutValuesToBuffer(device, (AFE49I30_ValueT*)&value, sizeof(value) / sizeof(AFE49I30_ValueT));
}
}
/********************************************************************************
* Function AFE49I30_PPG_Init
* Description Configure AFE for PPG and Start PPG
* Parameters None
* Return Value int32_t
* *****************************************************************************/
AFE49I30_Result AFE49I30_PPG_Init(AFE49I30_T* driver)
{
AFE49I30_Result ret = AFE49I30_ResultAccept;
AFE49I30_Reset(driver);
//Set Page 0 Registers
ret = ret | AFE49I30_SetRegValue(driver, AFE49I30_FIFO_CONFIG_REG, 0x000008); // SW Reset
ret = ret | AFE49I30_SetRegValue(driver, AFE49I30_PAGE_SELECT, 0x000000); // PAGE 0
ret = ret | AFE49I30_SetRegValue(driver, AFE49I30_FIFO_CONFIG_REG, 0x000002); // This bit is used to suspend the count and keep the counter in a reset state.
ret = ret | AFE49I30_SetRegValue(driver, 0x42,0x0003E0); // REG_WM_FIFO = 0X0F, ADC_RDY = 0010 [FIFO Ready]
ret = ret | AFE49I30_SetRegValue(driver, 0x02,0x600000); // Polarity of LED Offset DAC - if anode of PD connects to INM and cathode of PD connects to INP, set polarity to ‘1’ to subtract offset DAC current from the PD current
ret = ret | AFE49I30_SetRegValue(driver, 0x03,0x000000); // Start count for INT_OUT2 (programmable interrupt on GPIO2)
ret = ret | AFE49I30_SetRegValue(driver, 0x04,0x000000); // End count for INT_OUT2 (programmable interrupt on GPIO2)
ret = ret | AFE49I30_SetRegValue(driver, 0x19,0x000000); // Register Not Available
ret = ret | AFE49I30_SetRegValue(driver, 0x1A,0x000000); // Register Not Available
ret = ret | AFE49I30_SetRegValue(driver, 0x1E,0x000000); // Register Not Available
ret = ret | AFE49I30_SetRegValue(driver, 0x23,0x068000); // Enables the LSB bit control of the Ambient DAC. Always set to ‘1’. // 11 – 2.5X mode: Typical full scale current of LED driver is ~125 mA, OSC_DISABLE_128K = 128kHz
ret = ret | AFE49I30_SetRegValue(driver, 0x24,0x002000); // Enables the LED Offset DAC corresponding to TIA1
ret = ret | AFE49I30_SetRegValue(driver, 0x25,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x28,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x29,0x050000); // Keep device in the ‘Always active’ state //Disables blocks getting powered down in Deep Sleep phase
ret = ret | AFE49I30_SetRegValue(driver, 0x2A,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x2B,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x2C,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x2D,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x2E,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x2F,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x30,0x000000); // Read out state of EN_LDO_BYP. [LDO enabled]
ret = ret | AFE49I30_SetRegValue(driver, 0x31,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x34,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x35,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x39,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x41,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x49,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x4B,0x000000); // ADC_RDY_OPEN_DRAIN [0 = CMOS output]
ret = ret | AFE49I30_SetRegValue(driver, 0x4E,0xFE8000); // Programs the polarity (as Source or Sink) for the current source connected to INM_ECG in DC lead-off detect scheme or starting value of polarity of current source connected to INM_ECG in AC lead-off detect scheme. Set to invert of POL_ILEADOFFP
// PROG_VCOMP_LOW(111) = 0.5V , Programs the comparison voltage for the low-side comparator in DC lead-off scheme
// PROG_VCOMP_HIGH (111) = 1.3V, Programs the comparison voltage for the high-side comparator in DC lead-off scheme
// AC_LEADOFF_FREQ = Sets the switching frequency of input current sources in AC lead-off detect scheme, 0 = Switching frequency of current sources is PRF/4 , 1 = Switching frequency of current sources is PRF/2
ret = ret | AFE49I30_SetRegValue(driver, 0x4F,0x010000); // EN_LPF_ECG = Enable LPF in ECG signal chain
ret = ret | AFE49I30_SetRegValue(driver, 0x50,0x1C0000); // Setting NOT used bits // TODO
ret = ret | AFE49I30_SetRegValue(driver, 0x51,0x000000); // FIFO_OFFSET_TO_FORCE = FORCE_FIFO_OFFSET = MASK_FIFO_RDY = AUTO_MASK_FIFO_RDY
ret = ret | AFE49I30_SetRegValue(driver, 0x57,0x000000); // PROG_INT1_STC = Start count for INT_OUT1 (programmable interrupt on CLK pin)
ret = ret | AFE49I30_SetRegValue(driver, 0x58,0x000000); // PROG_INT1_ENDC = End count for INT_OUT1 (programmable interrupt on CLK pin)
ret = ret | AFE49I30_SetRegValue(driver, 0x5D,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x5E,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x5F,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x60,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x61,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x62,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x63,0x000000); // Read Only
ret = ret | AFE49I30_SetRegValue(driver, 0x6C,0x000000); // PDN_BG_IN_DEEP_SLEEP = Powers down the Bandgap when device is in Deep Sleep phase as well as during Software power-down mode This bit should be set to ‘0’ when operating with the LDOs enabled.
ret = ret | AFE49I30_SetRegValue(driver, 0x6D,0x000000); // Read Only
ret = ret | AFE49I30_SetRegValue(driver, 0x72,0x000000); // IFS_OFFDAC_TIA2 = Full-scale current control for Ambient Offset DAC of TIA2
ret = ret | AFE49I30_SetRegValue(driver, 0x73,0x047C3C); // Need to Read
ret = ret | AFE49I30_SetRegValue(driver, 0x74,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x78,0x80E005); // Need to Read
ret = ret | AFE49I30_SetRegValue(driver, 0x79,0x00E00E); // Need to Read
ret = ret | AFE49I30_SetRegValue(driver, 0x80,0x000000); // Need to Read
ret = ret | AFE49I30_SetRegValue(driver, 0x81,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x88,0x000007); // REG_NUMPHASE(111) = Sets the number of active signal phases as (REG_NUMPHASE+1)
// MODE_EN_FRAME_SYNC = Replaces MSB (D23) of each data going into the FIFO with a frame sync bit. Frame sync bit gets set to ‘1’ for the first FIFO data of every PRF cycle.
ret = ret | AFE49I30_SetRegValue(driver, 0x8A,0x000000); // Need to Read
ret = ret | AFE49I30_SetRegValue(driver, 0x8B,0x000100); // REG_TSEP_CONV_LED = Count that determines separation between end of CONV of previous phase and start of LED ON signal for the current phase when these signals are staggered (non-overlapping).
ret = ret | AFE49I30_SetRegValue(driver, 0x8C,0x000000); // Need to Read
ret = ret | AFE49I30_SetRegValue(driver, 0x8D,0x000000); // REG_TW_DATA_RDY = Count that determines width of the DATA_RDY pulse
ret = ret | AFE49I30_SetRegValue(driver, 0x8E,0x000000); // REG_TDEEP_SLEEP_PWDN = Count that determines DATA_RDY fall to start of Deep sleep phase
ret = ret | AFE49I30_SetRegValue(driver, 0x8F,0x000000); // Need to Read
ret = ret | AFE49I30_SetRegValue(driver, 0x90,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x91,0x000000); // Need to Read
ret = ret | AFE49I30_SetRegValue(driver, 0x92,0x000000); // Need to Read
ret = ret | AFE49I30_SetRegValue(driver, 0x93,0x000000); // Need to Read
ret = ret | AFE49I30_SetRegValue(driver, 0x94,0x000084); // Need to Read
ret = ret | AFE49I30_SetRegValue(driver, 0x95,0x000050); // Need to Read
ret = ret | AFE49I30_SetRegValue(driver, 0x96,0x003333); // 16 Average : REG_DEC1_FACTOR, REG_DEC2_FACTOR, REG_DEC3_FACTOR, REG_DEC4_FACTOR = 16 Number of sampled averaged
ret = ret | AFE49I30_SetRegValue(driver, 0x97,0x8E2860); // REG_NUMPHASE_DEC1 = 0, EN_DEC1 = 0, REG_NUMPHASE_DEC2 = 1, EN_DEC2 = 1, REG_NUMPHASE_DEC3 = 2, EN_DEC3 = 1, REG_NUMPHASE_DEC4 = 3, EN_DEC4 = 1
ret = ret | AFE49I30_SetRegValue(driver, 0xAC,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0xAE,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0xB4,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0xB5,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x98,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x99,0x2002AB); //
ret = ret | AFE49I30_SetRegValue(driver, 0x9A,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0x9C,0x000400); //
ret = ret | AFE49I30_SetRegValue(driver, 0x9D,0x0002AB); //
ret = ret | AFE49I30_SetRegValue(driver, 0x9E,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0xA0,0x000400); //
ret = ret | AFE49I30_SetRegValue(driver, 0xA1,0x0002AB); //
ret = ret | AFE49I30_SetRegValue(driver, 0xA2,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0xA4,0x000400); //
ret = ret | AFE49I30_SetRegValue(driver, 0xA5,0x0002AB); //
ret = ret | AFE49I30_SetRegValue(driver, 0xA6,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0xE6,0x000000); //
ret = ret | AFE49I30_SetRegValue(driver, 0xE7,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0xE8,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0xF5,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, AFE49I30_PAGE_SELECT, 0x000001); // PAGE 1
ret = ret | AFE49I30_SetRegValue(driver, 0x20,0x020000); // IN_TIA1<2> = Connect input pin set IN2 to TIA1
ret = ret | AFE49I30_SetRegValue(driver, 0x21,0x0074A1); // REG_NUMAV = 2
ret = ret | AFE49I30_SetRegValue(driver, 0x22,0x02000E); // REG_TWLED = 14,FIFO_DATA_CTRL = 2 [Phase [N] – Phase [N-1]: Determines the data associated with the phase to be stored in the FIFO]
ret = ret | AFE49I30_SetRegValue(driver, 0x23,0x0017B0); //
ret = ret | AFE49I30_SetRegValue(driver, 0x24,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x25,0x020202); // IN_TIA1<2> = Connect input pin set IN2 to TIA1, LED_DRV1_TX<2> = Connect LED driver 1 to TX2 pin,LED_DRV2_TX<2> = Connect LED driver 2 to TX2 pin
ret = ret | AFE49I30_SetRegValue(driver, 0x26,0x0094A1);
ret = ret | AFE49I30_SetRegValue(driver, 0x27,0x04000E); //
ret = ret | AFE49I30_SetRegValue(driver, 0x28,0x0014B0);
ret = ret | AFE49I30_SetRegValue(driver, 0x29,0x800404);
ret = ret | AFE49I30_SetRegValue(driver, 0x2A,0x020000); // IN_TIA1<2> = Connect input pin set IN2 to TIA1
ret = ret | AFE49I30_SetRegValue(driver, 0x2B,0x0074A1);
ret = ret | AFE49I30_SetRegValue(driver, 0x2C,0x02000E); //
ret = ret | AFE49I30_SetRegValue(driver, 0x2D,0x0014B0);
ret = ret | AFE49I30_SetRegValue(driver, 0x2E,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x2F,0x020404); // IN_TIA1<2> = Connect input pin set IN2 to TIA1, LED_DRV1_TX<3> = Connect LED driver 1 to TX3 pin, LED_DRV2_TX<3> = Connect LED driver 2 to TX3 pin
ret = ret | AFE49I30_SetRegValue(driver, 0x30,0x0095A1);
ret = ret | AFE49I30_SetRegValue(driver, 0x31,0x04000E); //
ret = ret | AFE49I30_SetRegValue(driver, 0x32,0x000020);
ret = ret | AFE49I30_SetRegValue(driver, 0x33,0x800404);
ret = ret | AFE49I30_SetRegValue(driver, 0x34,0x020000); // IN_TIA1<2> = Connect input pin set IN2 to TIA1
ret = ret | AFE49I30_SetRegValue(driver, 0x35,0x007C20);
ret = ret | AFE49I30_SetRegValue(driver, 0x36,0x020803);
ret = ret | AFE49I30_SetRegValue(driver, 0x37,0x0014B0);
ret = ret | AFE49I30_SetRegValue(driver, 0x38,0x050000);
ret = ret | AFE49I30_SetRegValue(driver, 0x39,0x020202); // IN_TIA1<2> = Connect input pin set IN2 to TIA1, LED_DRV1_TX<2> = Connect LED driver 1 to TX2 pin,LED_DRV2_TX<2> = Connect LED driver 2 to TX2 pin
ret = ret | AFE49I30_SetRegValue(driver, 0x3A,0x005C20);
ret = ret | AFE49I30_SetRegValue(driver, 0x3B,0x040803);
ret = ret | AFE49I30_SetRegValue(driver, 0x3C,0x0014B0);
ret = ret | AFE49I30_SetRegValue(driver, 0x3D,0x050404);
ret = ret | AFE49I30_SetRegValue(driver, 0x3E,0x020000); // IN_TIA1<2> = Connect input pin set IN2 to TIA1
ret = ret | AFE49I30_SetRegValue(driver, 0x3F,0x005C20);
ret = ret | AFE49I30_SetRegValue(driver, 0x40,0x020803);
ret = ret | AFE49I30_SetRegValue(driver, 0x41,0x0014B0);
ret = ret | AFE49I30_SetRegValue(driver, 0x42,0x050000);
ret = ret | AFE49I30_SetRegValue(driver, 0x43,0x020404); // IN_TIA1<2> = Connect input pin set IN2 to TIA1, LED_DRV1_TX<3> = Connect LED driver 1 to TX3 pin, LED_DRV2_TX<3> = Connect LED driver 2 to TX3 pin
ret = ret | AFE49I30_SetRegValue(driver, 0x44,0x005C20);
ret = ret | AFE49I30_SetRegValue(driver, 0x45,0x040803);
ret = ret | AFE49I30_SetRegValue(driver, 0x46,0x0014B0);
ret = ret | AFE49I30_SetRegValue(driver, 0x47,0x050404);
ret = ret | AFE49I30_SetRegValue(driver, 0x48,0x080000); //// IN_TIA1<4> = Connect input pin set IN4 to TIA1
ret = ret | AFE49I30_SetRegValue(driver, 0x49,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x4A,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x4B,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x4C,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x4D,0x080000);
ret = ret | AFE49I30_SetRegValue(driver, 0x4E,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x4F,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x50,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x51,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x52,0x080000);
ret = ret | AFE49I30_SetRegValue(driver, 0x53,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x54,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x55,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x56,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x57,0x080000);
ret = ret | AFE49I30_SetRegValue(driver, 0x58,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x59,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x5A,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x5B,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x5C,0x020000); // IN_TIA1<2> = Connect input pin set IN2 to TIA1
ret = ret | AFE49I30_SetRegValue(driver, 0x5D,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x5E,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x5F,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x60,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x61,0x020000);
ret = ret | AFE49I30_SetRegValue(driver, 0x62,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x63,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x64,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x65,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x66,0x020000);
ret = ret | AFE49I30_SetRegValue(driver, 0x67,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x68,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x69,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x6A,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x6B,0x020000);
ret = ret | AFE49I30_SetRegValue(driver, 0x6C,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x6D,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x6E,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x6F,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x70,0x020000);
ret = ret | AFE49I30_SetRegValue(driver, 0x71,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x72,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x73,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x74,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x75,0x020000);
ret = ret | AFE49I30_SetRegValue(driver, 0x76,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x77,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x78,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x79,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x7A,0x020000);
ret = ret | AFE49I30_SetRegValue(driver, 0x7B,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x7C,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x7D,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x7E,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x7F,0x020000);
ret = ret | AFE49I30_SetRegValue(driver, 0x80,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x81,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x82,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x83,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x84,0x020000);
ret = ret | AFE49I30_SetRegValue(driver, 0x85,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x86,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x87,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x88,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x89,0x020000);
ret = ret | AFE49I30_SetRegValue(driver, 0x8A,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x8B,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x8C,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x8D,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x8E,0x020000);
ret = ret | AFE49I30_SetRegValue(driver, 0x8F,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x90,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x91,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x92,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x93,0x020000);
ret = ret | AFE49I30_SetRegValue(driver, 0x94,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x95,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x96,0x000000);
ret = ret | AFE49I30_SetRegValue(driver, 0x97,0x000000);
/* Enable FIFO */
ret = ret | AFE49I30_SetRegValue(driver, AFE49I30_PAGE_SELECT, 0x000000); // PAGE 0
ret = ret | AFE49I30_SetRegValue(driver, AFE49I30_FIFO_CONFIG_REG, 0x000002); // This bit is used to suspend the count and keep the counter in a reset state.
ret = ret | AFE49I30_SetRegValue(driver, AFE49I30_FIFO_CONFIG_REG, 0x000040); // FIFO Enabled
ret = ret | AFE49I30_SetRegValue(driver, AFE49I30_TIMER_ENGINE_REG, 0xC000A0); // REG_PRPCT = 0xA0 [Decimal 160]
if (ret == AFE49I30_ResultAccept)
{
driver->Config.MeasureMode = AFE49I30_PPG_MODE;
driver->Config.SleepMode = AFE49I30_ACTIVE_MODE;
driver->Config.SamplingRate = AFE49I30_PPG_SAMPLE_12;
}
return ret;
}
