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DAC1282: Settings clarification

Alex Moran
Prodigy 30 points

Part Number: DAC1282

Hi, I'm just trying to get some clarification on setting up a DAC1282 with a custom pcb board that uses a stm32 F7 series chip.

First question:

From reading the data sheet it says the SPI interface is a half duplex system yet in all of the diagrams and figures in the datasheet is clearly shows that it has both a DIN and a DOUT line in the communication figures and in the pinout. I thought half duplex implied there was only one shared data line? Or would I still implement it as a full duplex and just not use the TransmitReceive command? im fairly confused about how all of this would work because everything else half duplex related only shows one data line that I've seen. 

Second question:

 What SPI mode would this need to be in to operate successfully? From the data sheet it says high or low for polarity and "Data are input on the serial clock (SCLK) rising edge and output on the SCLK falling edge" for the clock phase so would that be SPI mode 0 and 2 are valid options or do I have that backwards?

The biggest issue I'm currently trying to solve is that my data on the logic analyzer always either seems to shift left, shift right, lose the last bit, lose the first bit, or give me zero when it shouldn't depending on which SPI mode I set it as in the MCU settings. This is all on the MOSI line trying to send opcodes to read some of the config registers. I'm sure it's probably a combination of improper SPI settings along with something else I'm overlooking but instead of trying to brute force my way though I thought I would ask the experts. Thank you in advance for taking the time to answer my questions.

  • 0
    TI__Guru 50930 points

    Hello Alex,

    The DAC1282 can use SPI mode 0. DOUT is driven on the falling edge of /CS, and the rest of the bits are launched on the falling edge of SCLK.  Data on DIN is captured on the rising edge of SCLK, and the host controller should capture data on the SCLK rising edge as well.

    In order to read data from the DAC1282, you need to send a minimum of 24 SCLKs.  You can do this by taking /CS low, and then sending 3x 8b transfers.  Below are the details for reading data from the DAC internal registers.  In this example, you are reading back 2 bytes, which results in a 32b transfer instead of 24b.

    The reason we say SPI is half duplex is because commands sent on DIN and responses on DOUT do not occur on the same clock edges.  The first 2 bytes of a read reg command are don't cares on the DOUT, and then when you read the response from DOUT, DIN is held low.

    Regards,
    Keith