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DAC8775: invalid data

Part Number: DAC8775

Hi team,

We used DAC8775. For /LDC signal, we use it in Synchronous Mode now.

 

DAC8775 Datasheet said, if certain delay “SYNC rising edge->LDAC falling edge” 33ns is not met, invalid data will be loaded. How about the invalid data?

Because we found that /LDAC signal may be corrupted in some EMC case, does it mean that will affect the output of DAC?

Thanks

Lillian

  • Hi Lillian,

    Yes, if the LDAC pin goes low before this 33ns timing requirement is met, invalid data can be loaded into the DAC registers. If the LDAC signal is brought low a long time after this 33ns, the DAC output should be what you expect. Let me know if you need any other clarifications.

    Thanks
    Erin