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ADS42LB69EVM: TSW1400EVM (obsolete) Replaced by Nexys Video Artix-7 FPGA Trainer Board

Part Number: ADS42LB69EVM
Other Parts Discussed in Thread: ADS42LB69

I understand from a March 2024 post in this forum that the TSW1400EVM is obsolete and will be replaced by a Nexys Video Artix-7 FPGA Trainer Board and a new interposer card. Therefore, I assume the old ADC eval setup shown in FIG. 5 of the ADS42LBx9EVM User Guide slau465a will be modified to replace the TSW1400EVM bd with the Nexys Video Artix-7 FPGA Trainer Board and a new interposer card that connects the Nexys board to the ADS42LB69EVM board. Is this correct? Are there any other changes to the eval setup? Is new control & display software also required? If so, when will it be available and what's the P/N? When will the interposer card be available and what is its P/N?

  • Hi Randy,

    Do you already have an ADS42LB69EVM?

    This EVM will also be obsoleted, if not already.

    Please let me know.

    Thanks,

    Rob

  • No. We are considering a vendor's existing SOSA-compliant ADC FMC card for a project we are doing. The ADS42LB69EVM ADC is implemented on the card. We are considering an unconventional use of the ADS42LB69 in which our input frequencies are 1kHz to 100kHz, so we are concerned about low frequency operation which I suspect the ADS42LB69EVM may not have been specifically designed for.

    In tech note SBAA220 a low frequency loop running around the ADS42LB69 input buffer that has a corner at 190kHz is discussed. The tech note is about compensating for the highpass response in the forward path created by this loop for lower freq operation, but it also states:

    "... at very-low input frequencies, the high-pass structure inside the analog buffer results in a degradation of linearity as well. The compensating network only corrects the low-frequency response of the buffer and cannot correct the linearity degradation.”

     So, our underlying questions are:

    1. how bad is the linearity degradation for low frequencies (<190kHz)?

    2. can the loop be disabled?

    3. Are there other "gotchas" related to low frequency operation?

    4. Has any low frequency test data been taken? If so, could that be shared?

    Our ultimate goal is to find out ASAP whether or not the ADS42LB69 is a viable solution for our application. We do not need the eval test setup and obsolete board replacement solution if it is not a viable solution. Is the viability of this ADC for our application something TI Engineering could comment on?

  • Hi Randy,

    Thank you for the details.

    So basically what I am hearing is you need an ADC that can DC couple, that is dual channel, ~75dB SNR, 250MSPS sampling?

    If so, we might be able to recommend another device that will better fits your needs.

    Please advise.

    Regards,

    Rob

  • No. What I am saying is I want to know what the caveats or potential pitfalls are of using the ADS42LB69 with an input frequency range of 1kHz to 100kHz.

    1. how bad is the linearity degradation for low frequencies (<190kHz) mentioned in tech note SBAA220 ? Minor degradation, or w.c. would the loop track out the input signals?

    2. can the loop be disabled?

    3. Are there other "gotchas" related to low frequency operation (<190kHz)?

    4. Has any low frequency test data been taken? If so, could that be shared?

    The main reason for using the ADS42LB69 is that it already resides on an FMC card we were hoping to re-use so we can save all the time of spinning and debugging our own card. If we have to spin our own card, we already have a working ADC solution we could implement. It is just not designed into a compatible FMC card.

    Could you ask someone in the development group for the ADS42LB69 the 4 questions above? Or, could you ask the authors of tech note SBAA220 Sourabh Gupta or Nagarajan Viswanathan? I'm guessing they would know off the top of their heads whether low frequency operation (<190 kHz) is feasible or not.

    Thanks.

  • Hi Randy,

    I will ask, however, I am not sure we have tested the device with that low of frequency input.

    Give me a few days to get back to you.

    Regards,

    Rob

  • Hi Rob,

    I'm hoping that the development engineers that were involved in designing the loop or managing the design of the loop would have a good idea of how the loop will affect low frequency inputs. Unfortunately, we can't test this ourselves since the eval boards are obsolete.

    thanks,

    Randy

  • Hi Randy,

    I spoke to the authors of the app note you have referred to above.

    Unfortunately, we don't have the information you are looking for.

    If I can find an EVM, I am happy to send one over to you for your own development and testing.

    Will that work for you?

    Thx,

    Rob

  • Hi Rob,

    Yes. That would be great. I'd need the ADS42LB69EVM and the Alterra controller bd (TSW1400EVM) from what I understand from Section 3.1 Test Block Diagram in the ADS42LBx9EVM_User_Guide_slau465a document.

    Thx again,

    Randy

  • Hi Randy,

    I am closing this post and will contact you offline. Please lookout for my email.

    Regards,

    Rob