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I'm looking to reprogram the onboard FPGA so that I can use the external trigger TRIG_IN SMA connector as well as access the raw data coming from the ADC12DL2500EVM. According to the schematic, it seems that TRIG_IN is connected, and when I give it a signal, I see a signal out the other end of the U2 buffer. I'm hoping to be able to use this TRIG_IN signal to sync my data in the HSDC Pro GUI.
I've already seen the SLVC814 file on the website, but it doesn't seem to have what I'm looking for. If it is, could someone please clarify where the IO pins are?
Also, could someone clarify how I would go about reprogramming the FPGA?
Thank you in advance.
Is it also possible to get the FPGA firmware (VIvado project) for the latency test pass-through design mentioned on page 3 of SBAU374A. This would provide the minimum design to pull data from the ADC and forward on to the DAC board, which would be a good starting point for a number of customer designs. Thanks!
Hi Kevin/Paul,
Unfortunately, the FW was built from a third party vendor that we are no longer partnered with, we can no longer support this.
Regards,
Rob