ADC08D1520: CONFIGURATION FOR ADC FOR THE 1350MHz SAMPLING RATE AND 200MHz DATA CLK

Pradeep Reddy

Part Number: ADC08D1520

I want to use two independent channels in ADC08D1520 with 1350MHz sampling Rate and FPGA clock at 200MHz can you recommend me the configuration required in ADC for this?

over 1 year ago

0 Drew Harrell over 1 year ago

TI__Intellectual 2280 points

Hi,

Would you be able to please send a block diagram of your system and what you are trying to do? I am unsure of what is meant by "FPGA clock".

Best regards,

Drew

0 Drew Harrell over 1 year ago in reply to Drew Harrell

TI__Intellectual 2280 points

Hi,

I am going to close this thread. You can always reopen it if needed.

Best regards,

Drew

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ADC08D1520: CONFIGURATION FOR ADC FOR THE 1350MHz SAMPLING RATE AND 200MHz DATA CLK