ADS8326: ADS8326IDGKT

Hi Antoine,

Welcome to our e2e forum!  If the /CS lines are swapped or you somehow have SDI and SDO mixed you can get a variable output voltage level.  Can you share your schematic and perhaps a screen shot of your /CS, SCLK, and SDO lines?

Hi,

Thanks for your reply. For my part I have a MCP4251 and ADS8326 connected on same CLK and MOSI lines, the CS lines are two different line for each component and the MISO line is just connected at the MCP. This card is connected at a backplane card and the signals are connected at a FPGA. When the component are mounting separately there is no problem. All signals are compliant.

We have a other schematic who use two ADS8325 whith same process (CS separate, same CLK and MOSI) and there is similar problem.

So I think the problem is ADS8325.

Can you get some scope shots?  Both of these devices should put SDO in a hi-impedance state when /CS is high.

The first picture is the communication with the MCP:

The second picture is the communication with the ADS:

Number one: MISO line

Number two: CLK line

Number three: MOSI line

The cs line is not present on the scope shots.

Can you please include /CS?

Sorry we can't present you our new screen shot with CS because the problem no longer shows up. The system look functional with the ADS an MCP on the same SPI. We come back if the problem appears again.

Thanks for your time.