• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 47 subscribers
  • Views 113 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADC3664: Sharing DCLK, FCLK

Steve Widener
Genius 10275 points
Part Number: ADC3664

Tool/software:

I have a situation where 4 of the ADC3664 devices will be used in a design. The devices will operate from the same input clock source and are intended to be synchronous. 

My question is: can the FPGA receiving the the data streams use the DCLK & FCLK from one of the converters rather than running the DCLK/FCLK from each converter to the common FPGA. This would save 6 signal from being routed if it is possible.

Thanks


Steve

  • +1
    TI__Mastermind 27400 points

    Hi Steve,

    Unfortunately, we don't recommend that, we have seen customers try this and sometimes it works and sometimes it does not, especially as other dependences start to change, ie - temperature and power supply variances.

    Please use a DCLK and FCLK connected to the FPGA for each ADC device.

    Regards,

    Rob