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ADS54J60: Excessive noise seen on ADCs when shorts applied at inputs

Part Number: ADS54J60

Tool/software:

Hello,

We are doing analysis and validation of our new board tat features two ADS54J60 and we are noticing lots of noise at higher levels than expected.

For context we have applied SMA shorts to channels, 50 ohm terminations, and even directly shorting the ADC inputs.

We have the following histogram from the ADC Pro tool showing channel 4 which has a direct short on the ADC inputs:

I am also including a capture file (adcs.txt) where, channel 1 is floating (no termination or short on this channel), channel 2 has a 50 ohm termination, channel  3 has a short on the connector and channel 4 has a short directly on the ADC inputs.

adcs.txt

Can we get some suggestions of where this noise is potentially coming from?

Thanks,

Ryan

  • Hi Ryan,

    Have you verified you can capture the frequency or time domain correctly?

    Lets start there first.

    Regards,

    Rob

  • Hello Rob,

    Yes, we see the correct waveform in the time domain and we see the correct frequency in the FFT plot.

    For example here is the waveform and spectral plot at 170MHz @ -1dBFS (just Channel 1 and Channel 2 being supplied)

    Regards,

    Ryan

  • Hi Ryan,

    The noise floor of the FFT looks pretty high, ie - poor.

    I would start by improving the clocking source or scheme to the ADC. As you capturing a lot of wideband noise/jitter from the clock.

    This is probably why you are seeing a poor histogram measurement.

    If you want to share your schematic, that would be helpful.

    Another thought to, take an FFT capture without the analog input signal applied, just take an FFT capture of the noise floor only.

    Regards,

    Rob