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ADS7953: ADS7953

Part Number: ADS7953

Tool/software:

Hi, I have some questions about ADS7953 SPI sequnce.

 I have set ADS7953 in Auto1 mode and if the CS falling edge aligns with the SCLK falling edge, or if SCLK is high when the CS falling edge occurs, does this conform the sequencing requirements?

Will the ADC chip be able to be read and written normally? If not, I wonder if it is all chips that have faults or only individual chips that have faults?

What is the root cause of this failure?

  • Hi Bo,

    SCLK should be low by the time of a CS falling edge. SCLK and CS falling edges coinciding or SCLK being high after a CS falling edge do not conform to the expected timing requirements of this device. 

    The device could possibly operate otherwise, but the device is not qualified for operation in that case. I'm not equipped to make a determination of whether this would be the case with every chip or certain individual chips, and from our perspective, this would not constitute a device failure in any case.

    Regards,
    Joel