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ADS54J60EVM: Reducing the interleaving spurs

Part Number: ADS54J60EVM
Other Parts Discussed in Thread: ADS54J60

Tool/software:

Hi,

I want to reduce the interleaving spur at fs/4. I have an eval board of ADS54J60 and TSW14J50EWM. I tried to follow the application note (Implementing the External DC Offset Correction Block in the ADS54J60), but I am stuck in chapter 5.3 bullet 1. DC Calibration Bandwith. The configuration file "DC_IL_Freeze1.cfg" is missing.

There is no problem creating the mentioned file (files), but we are confused about the right register address. In the datasheet are mentioned 6100h and 0000h addresses. Which one is the right? Also, we tried both of them, but nothing worked properly.

Can you send us these files or send us the right procedure?

Thanks