Tool/software:
The problem is that a minority of ADC8684 circuits do not emit VREF on output or response on MISO. I am currently exploring if the ADC is in power-down or external VREF modes. Troublesome, as this can only be diagnosed symptomatically.
Currently investigating if initial power sequencing (or other power characteristic) is source of problem. Further i am trying to prove or dis-prove that the ADC is interpreting the duration of the *RST/*PD low state relative to Power Supply Levels and ramp time as power down signaling.
I am comparing those configurations that work vs. those that do not.
At this time i do not see significant difference between working and non-working ADCs states regarding *RST/*PD Pin initial positive EDGE (due to 47k to DVDD) and availability and level of either 3.3Vdc (DVDD) or 5Vdc (AVDD) Supplies.
