Tool/software:
Hello,
I created the TI204C JESD IP project using vivado 2024.1, but the mgt_8b10b_wrap module (file: gth_8b10b_rxtx.sv) is not instantiated inside the TI_204c_IP_entity.sv or TI_204c_IP_ref.sv.
I am following this document TI204c-IP-Users-Guide.pdf. In this document there are chapter 6.1 and 6.2 which said: "The transceiver is
embedded within the design and instantiated in a wrapper module with one of the following names:" and "This is a packaged IP that is instantiated inside the JESD TI204c IP..."
will I have that to instantiate this module who is responsible for controlling the FPGA transceiver?
regards
Erivelton Castro
