AFE58JD28: SYSREF Differential signaling issues

Blue is SYSREF_P, this clock is not quite right, in this case is the differential high voltage is too low AFE will not recognize it

Hi,

Can you please describe your problem ? Is sysref signal is not detected by device ? Why is p and m signal have different high/low voltage ?

Is it possible to share the sysref circuit ?

Following the AFE58JD28EVM schematic, using an oscilloscope to measure the common mode voltages of _P and _N are different, is there a problem with the provided schematic? Now the phenomenon is that JESD204B enters into the receiving data stage, I set the ADC to test mode and send BC50H, the received data is not BC50H, the phenomenon of providing the SYSREF signal and not providing it is the same, so I suspect that the ADC does not receive the SYSREF

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Sysref required from device requries common mode to be 0.7. In the datsheet it is explained how to shift the common mode . This might not be followed on EVM . In that case you see the difference is sysrefp and sysrefm min and max value.

No,  sysref should not cause this . You can use adc test mode such as ramp/ toggle pattern/ constant pattern to  see at the output 

Also, I would like to ask what is the data format of the first frame of the ILA transmission phase of the AFE58JD28 JESD? I know the second frame transmits link configuration data, is the data in the first frame arbitrary?

Yes , It can be arbitrary . But I am curious ,why do need that info? 

Because I saw in one of TI's explanatory documents that the first frame is the sum number