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ADS7038Q1EVM-PDK: Auto-Sequencing doesn't restart after clearing CRCERR_IN flag

Deepak Verma
Prodigy 10 points
Part Number: ADS7038Q1EVM-PDK
Other Parts Discussed in Thread: ADS7038-Q1,

Tool/software:

Dear Sir/ Ma'am,

I am trying to use the chip ADS7038Q1 in Auto-sequencing mode. I have enabled Oversampling, CRC, Channel ID append. I have then activated auto-sequencing for channels 1 to 7. CONV_ON_ERR is set to 1b. I see channels do increment after Starting sequencing. Then I introduce CRC error from the microcontroller to see the reaction. The sequencer stops. I clear the CRCERR_IN flag. This should re-start the sequencing but doesn't. 

A status register read at this time shows SEQ_STATUS = 0b (Stopped). Could you please look into the matter and advise? I am unable to attach the .sal file. Will try to upload it afterwards. Below I am writing my sequence of commands:

1. Reset

2. BOR flag reset

3. Channel ID append enable

4. CRC Enable

5. OSR Enable

6. Channels 1 to 7 activated for auto-sequencing

7. Seq Mode = 1, Conv Mode left to default (0)

8. CONV_ON_ERR set 

9. Start Sequencer

10. Status Register Read, which gives 0xC0 in reply

*****allowed Sequencer to work for a while, then I introduce CRC error*****

11. Clear CRC_ERR_IN flag

12. Status Register read, which gives 0x80 in reply.

Looking forward to your advise!

Many thanks & best regards

Deepak Verma

  • 0
    TI__Genius 15510 points

    Hi Deepak,

    Can you try reading the value of the SEQ_START bit (bit 4) in the SEQUENCE_CFG register (address = 0x10)? It's possible that it is reset when a CRC error is detected. If so, the SEQ_START bit will have to be set once again after clearing the CRCERR_IN bit.

    Regards,
    Joel

  • 0 in reply to Joel Meraz
    Prodigy 10 points

    Hello Joel, 

    Thanks for your fast reply. I have actually tried that. That bit is still set. I have even tried resetting it and then again setting it. Still does not work. 

    Regards

    Deepak

  • 0 in reply to Deepak Verma
    TI__Genius 15510 points

    Hi Deepak,

    Could you clarify if you are using the ADS7038-Q1 in an original design, or if you are using the ADS7038Q1EVM-PDK through the online GUI? If it is the second as per the thread is marked, I can help to provide more specific support. Thanks.

    Regards,
    Joel

  • 0 in reply to Joel Meraz
    Prodigy 10 points

    Hi Joel,

    I am using the ADS7038Q1EVM-PDK with our own board. Not the motherboard provided with the kit. Therefore not using the online GUI. Thanks.

    Regards,

    Deepak

  • 0 in reply to Deepak Verma
    TI__Genius 15510 points

    Hi Deepak,

    Thanks for the clarification. After you trigger the CRC error, the SYSTEM_STATUS register should read 0xC2. Can you confirm this?

    Clearing the CRCERR_IN bit is done by writing a 1 to the bit. I accomplished this with the "set bit" opcode.

    Afterwards, I read the SYSTEM_STATUS register and read 0xC0 as before the CRC error was triggered, so it is interesting to me that you are getting 0x80 and the SEQ_STATUS bit isn't set anymore. Is there any other configuration you are doing in between after triggering a CRC error? Did you maybe modify the CONV_ON_ERR parameter in the OPMODE_CFG register?

    Regards,
    Joel

  • 0 in reply to Joel Meraz
    Prodigy 10 points

    Hi Joel,

    Thanks for looking into it. After triggering the CRC error, the SYSTEM_STATUS register reads 0x82 (not 0xC2 as it should). So it is here that SEQ_STATUS bit isn't set anymore. After that I am not doing any configuration. CONV_ON_ERR I have set to 1 previously. So my SYSTEM_STATUS goes from 0xC0 (before error) to 0x82 (after error). And to 0x80 after clearing the CRCERR_IN using the "set bit" opcode.

    Regards,

    Deepak

  • 0 in reply to Deepak Verma
    TI__Genius 15510 points

    Hi Deepak,

    My mistake. I missed where you mentioned that CONV_ON_ERR is set. 

    Then, after the CRC error occurs, the SYSTEM_STATUS register returns 0x82, meaning the sequence is stopped. Reading the SEQUENCE_CFG register reads back 0x11, indicating that SEQ_START is still set. However, providing conversion frames does not actually sequence through channels as described.

    The only way I found to reinitiate the sequence after a CRC error was to toggle the SEQ_START bit low and then high again. Afterwards, the channel ID field after the conversion increases again. 

    I'll consult with my team on whether this is a documented issue or expected behavior. As of now, my recommendation is to toggle the SEQ_START bit low and then high after clearing the CRCERR_IN bit to reinitiate sequencing of the MUX.

    Regards,
    Joel

  • 0 in reply to Joel Meraz
    Prodigy 10 points

    Hi Joel,

    Thanks for the recommendation. Yes it works this way.

    Best regards,

    Deepak