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TLV5637 DAC UPDATE FROM INTERNAL REGISTER

Other Parts Discussed in Thread: TLV5637

Hello All,

             I had a doubt of updating dac out from internal register to dac.Its said in datashet that it can be done automatically in the 16th clock pulse rising edge OR by applying chip select(10th Page).As i made chipselect grounded  always and start writing the above said manner so as to update in 16th clock pulse is not working.please post your valuable help.

Thanks & Regards 

Anoop.G.S

 

  • Hello Anoop,

    The TLV5637 will update its output on the 16th rising SCLK if the SPI bus is set for Mode 2 (CPOL 1, CPHA 0). The data needs to be valid on the falling clock edge. The 16 falling edges puts the data in the register and the clock returning to its high idle state would be the 16th rising edge to update the output. As stated in the "Serial Interface" section (page 10 of the datasheet):

    "A falling edge of CS starts shifting the data bit-per-bit (starting with the MSB) to the internal register on the falling edges of SCLK."

    So, tying it to ground would inhibit the initializing of data shifting (Figure 1, page 6, is a good reference to use for toggling CS).