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ADC3562: SCLK between Register Adress and Register Data

Part Number: ADC3562

Tool/software:

Hello team,

Customer wants to put pause to SCLK after last clock of Register Address bit, as shown on the diagram below.

How long can it wait after falling edge of register address?

Best Regards,
Kei Kuwahara

  • Hi Kei,

    We have no way to validate timing beyond what is in the datasheet.  Theoretically, since the SPI is edge triggered they should be able to wait for any length of time before sending the final falling edge.

    Regards,

    Geoff