ADS52J90: JESD protocol, eight-chip ADC synchronization problem

zai da

Part Number: ADS52J90
Other Parts Discussed in Thread: LMK04832, LMK00308

Tool/software:

I want to use eight ADCs to form my system using the JESD protocol, but I'm having trouble providing a clocking scheme, I'd like to ask if I can satisfy the requirements of the JESD protocol by using the method shown in the figure, and will these clocks fail to satisfy the requirements of the homologous clock due to the additional delay introduced by the clock buffer?

over 1 year ago

0 Karthik Nagabhushana over 1 year ago

TI__Expert 4980 points

Hi,

LMK04832 already has 15 pairs of CLKs + SYSREFs. We would recommend to use these clocks directly to drive each ADS52J90 devices.

Thanks,

Karthik N

0 Shabbir Amjhera Wala over 1 year ago

TI__Expert 4731 points

Hi,

You can consider using LMK00308 for clock buffer. You can find clocking scheme in below article.

https://www.ti.com/lit/an/snaa311a/snaa311a.pdf

Regards,

Shabbir

0 xiaorui wei over 1 year ago in reply to Shabbir Amjhera Wala

Prodigy 60 points

Hi, I have read the document you recommended and it does mention JESD,to be on the safe side I would like to get a definitive answer as to whether or not I can use the LMK00308 on my design? Can it be used to buffer a single pulse of SYSREF signal and meet my JESD design requirements?

0 zai da over 1 year ago in reply to Shabbir Amjhera Wala

Prodigy 10 points

+1 Karthik Nagabhushana over 1 year ago in reply to zai da

TI__Expert 4980 points

Hi,

Yes, you can use LMK00308.

But make sure that your SYSREF and CLK routing has same length starting from the clock chip to all the ADC chips.

Also, ensure that SYNC routing is same length from the FPGA to all the ADC chips.

Thanks,

Karthik N

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ADS52J90: JESD protocol, eight-chip ADC synchronization problem