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DAC63002: Using an external reference with the DAC63002

Yeongbin Ahn
Prodigy 30 points
Part Number: DAC63002

Tool/software:

I am using it by connecting an external reference to DAC63002. Signals are being sent via SPI communication.

Under normal conditions, there is almost no current consumption from the external reference to the DAC63002. However, an SPI communication error occurs intermittently (the SYNC signal goes low throughout one period), and this is when a problem occurs.

When an SPI communication error occurs, current flows from the external reference to the DAC, causing the reference voltage to fluctuate.

I think the cause is a conflict between the external reference and the DAC internal reference as the DAC stops working due to a communication error. Is there a way to solve this problem?

The best way would be to prevent the communication error itself from occurring, but it is difficult to completely eliminate this in the current usage environment.

And if the DAC output drops for a short period of time, it does not cause any major problems to the overall operation. However, the fluctuation of the reference voltage must be prevented because it affects the entire signal handled by the product.

Is there a way to prevent current from flowing from the external reference to the DAC by modifying the circuit or modifying the DAC setting parameters?

  • 0
    TI__Mastermind 35218 points

    Hi Yeongbin, 

    Do you see the same fluctuation on the external reference even when normal SPI transactions are sent? Or only when the SPI communication error occurs? Can you provide more details on the error? Are there any toggles on the data bus, SDI, when SYNC is brought low?  To suggest a remedy, I'd need to understand why the reference is seeing this issue in the first place. 

    Do you have a capacitor connected to the reference pin, VDD, and the CAP pin?

    Best,

    Katlynne Jones

  • 0 in reply to Katlynne Jones
    Prodigy 30 points

    Hi Katlynne,

    Thanks for your reply.

    Reference voltage fluctuations do not occur when normal SPI transactions are sent.

    As shown in the figure below, in normal conditions, the SYNC signal goes low for only a short time when the SDI is sent and then immediately returns to high, and the reference voltage is also maintained at 2.5V during this time.

    However, intermittently, the SYNC signal goes low for one period (4ms), and at this time, the 2.5V Reference voltage also goes down.

    What I confirmed is that at that time, a lot of current flows from the 2.5V reference to the VREF pin of the DAC (in normal conditions, almost no current flows to the VREF pin), and because of this, the reference voltage cannot maintain 2.5V and falls below. And when the SYNC signal returns to normal, the reference voltage is also recoverd to 2.5V.

    And while the SYNC signal drops like that, the SDI signal continues to be sent normally.

    For the capacitor, 0.1uF is connected to the reference pin and VDD pin, and 1uF is connected to the CAP pin.

    If there is anything else I need to check, please let me know.

    Thank you.

  • 0 in reply to Yeongbin Ahn
    TI__Mastermind 35218 points

    Hi Yeongbin, 

    What are the blue and pink traces on the scope? What is the noise on the blue trace?

    Do you know the cause of the incorrect sync post? Can you measure the voltage supply of the reference IC you are using when the output dip occurs? 

    Best,

    Katlynne Jones 

  • 0 in reply to Katlynne Jones
    Prodigy 30 points

    Hi Katlynne,

    The pink trace is a test pin signal added separately to check whether the SYNC signal is normal. In other words, it is the same signal as the SYNC signal. The blue trace is an I2C communication signal that goes to other part.

    From the above results, it may appear that the SYNC signal dip occurs when I2C communication is in progress, but the SYNC signal dip still occurs even after we turn off I2C communication, and the reference voltage continues to fluctuate at same timing.

    We cannot find what causes the dip in the SYNC signal. However, what we are also curious about is why does current flow into the DAC's VREF pin when a SYNC signal dip occurs? It seems as if the VREF pin is internally connected to another node such as GND or internal reference when a SYNC error occurs.

    Is there a way to prevent current from flowing to the VREF pin even if a SYNC signal error occurs?

    A 3.3V voltage is connected to the supply voltage of the reference IC, and it was confirmed that the 3.3V voltage is maintained even when the reference voltage fluctuates.

    Thank you.

  • 0 in reply to Yeongbin Ahn
    TI__Mastermind 35218 points

    Hi Yeongbin, 

    I will try to recreate this on my setup, but it is very odd that the DAC does not see this issue with a normal SPI write as SYNC goes low. I'll let you know if I see the same behavior. 

    Is the DAC the only device that the reference is connected to in your circuit? Can you try two more tests?

    1. Disconnect the reference from the DAC and wait for an incorrect sync pulse. Do you still see odd reference behavior? 

    2. Leave the reference connected and disconnect the sync line from the DAC. Do you still see odd reference behavior when the incorrect sync pulse occurs? 

    I still don't understand where the issue is coming from to be able to make a suggestion to prevent it as the DAC should not have this behavior. The only recommendation I have right now would be to add a larger bypass capacitor to the reference pin or buffer the reference output to reduce the effects of the extra reference current. 

    Best,

    Katlynne Jones

  • 0 in reply to Katlynne Jones
    TI__Mastermind 35218 points

    Hi Yeongbin, 

    Can you also share you schematic for the DAC and reference circuit? I am only seeing about a 100nA change in reference current when I ground the SYNC pin. Do you know how much current is being sourced from the reference during normal operation and during a incorrect sync pulse? 

    I don't expect that 100nA of current would have the impact on the reference voltage output that you are seeing. 

    Best,

    Katlynne Jones