ADS1274, Daisy-Chain Error

Hi Lee,

Welcome to our forum!  Can you please post a schematic showing the hookup of your two ADS1274 devices and perhaps a screen shot of your SPI communication?  Based on your description above, its difficult to say what might be wrong so any additional detail you can provide would be appreciated.

I can't attach my drawing.

Please let me know your email.

I'll send to you.

Thanks.

I sent my drawing to you.

Please check it!

Hi Lee,

We're looking over it now and will get back to you soon...

Hello, Tom.

I revise Pin 8, 9, 12.

They are connected DGND now.

8ch data is out but there is delay in second ADC.

I'll send to you to graph.

Please check it, too.

Hi Lee,

From looking at these plots, it would appear as though your ADS1274's are not synchronized.  Are the two devices using the same CLK_ADC input?  From the schematic you sent, it would appear as though they do, but I don't know how that is implemented.  What is the main clock source and how is it routed to the two chips?  How is SYNC applied to the two devices?

Hi Tom,

two syncs are connected and pullup by 4.7k ohm.

They are controlled by MCU's GPIO.

At booting, MCU outs 0 and 1 after 140ns.

ADCs' clk is changed after sync.

Hi Tom,

My application needs variable speed.

It means clk of ADC is changed during operation.

sync is followed at every time of clock change, is it right?

Thanks

Hi Lee,

Assuming that CLK_ADC is the same phase/frequency to all ADS1274 devices, it should only be necessary to sync the parts once after the initial clock start up.  If the clocks are different taps off of your PLL chip, re-syncing periodically might help.  See if you can grab scope shots of the two CLK inputs and send them along to us.    

Great!  Thanks for letting us know.