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Tool/software:
Dear Sir,
In the ADC datasheet, it is mentioned that the default comma character for JESD204B is K28.7. However, when I assign K28.7, I am unable to get data or lane up. When I assign K28.5, I get the data and lane up signal, but sometimes the ADC output has glitches. Please guide me with your ideas.
Thanks & Regards
Ramavath Raj Kumar
Hi Ramavath,
Can you show an image of the glitch you're talking about? K28.5 is the code group synchronization comma character while K28.7 is the default JESD204B end of frame comma character for frame alignment. Another you'll see often is K28.3 which is used as an end of multiframe alignment comma character.
Thanks
Hi Chase,
Please find the screenshot below.
The circled signal is the output of the JESD IP core. It is expected to be a clean sine wave, but some portions of it are noisy, as you can see in the screenshot.
I wanted to configure it with the following specifications:
Could you please help me resolve this issue? If possible, please send the .cfg GUI configuration file.
Thank you.
Hi Raj,
I cannot assist with the xilinx JESD IP core. I am unfamiliar with this. Does the corrupt data occur on the same channel IQ output each time or does it swap randomly? If it doesn't swap at all, I would check that the serdes lane polarity is correct. What is the K value you are using? If changed from the default of K=32, can you try setting back to max (set ADC register 0x202 to 0x1F for K=32)? Next would be placing the ADC into a ramp test mode for example and confirm the raw lane data is ramping as expected.
Thanks, Chase
Hi Chase,
Thank you for your replay.
I am using TI-204C IP core from TI in JMODE11 with ADC12DJ3200EVM and KCU105.
I have tried changing the K value to 32 and ran the Ramp test mode. Still the noise is there at the lanes output. I am sharing you the screenshot and adc config file for your reference.
Thanks & Regards
Ramavath Raj Kumar
ADC12DJxx00
0x00 0x30
0x02 0x00
0x10 0x00
0x23 0x00
0x29 0x00
0x2A 0x00
0x30 0xC4
0x31 0xA4
0x32 0xC4
0x33 0xA4
0x38 0x00
0x3B 0x00
0x48 0x00
0x60 0x01
0x61 0x01
0x62 0x01
0x64 0x00
0x6B 0x00
0x6C 0x01
0x70 0x00
0x71 0x00
0x79 0x80
0x7A 0x00
0x7B 0x00
0x7C 0x00
0x80 0x00
0x81 0x00
0x82 0x00
0x83 0x00
0x84 0x00
0x85 0x00
0x86 0x00
0x87 0x00
0x88 0x00
0x89 0x00
0x8A 0xFF
0x8B 0x07
0x8C 0xFF
0x8D 0x07
0x8E 0xFF
0x8F 0x07
0x90 0xFF
0x91 0x07
0x92 0xFF
0x93 0x07
0x94 0xFF
0x95 0x07
0x102 0x80
0x103 0x80
0x112 0x80
0x113 0x80
0x122 0x80
0x123 0x80
0x132 0x80
0x133 0x80
0x142 0x80
0x143 0x80
0x152 0x80
0x153 0x80
0x160 0x00
0x200 0x01
0x201 0x02
0x202 0x1F
0x203 0x01
0x204 0x06
0x205 0x04
0x206 0x00
0x207 0x00
0x208 0x00
0x209 0x00
0x20C 0x00
0x20D 0x00
0x210 0x00
0x211 0xF2
0x212 0xAB
0x213 0x00
0x214 0x00
0x215 0x00
0x216 0x02
0x217 0x00
0x218 0x00
0x219 0x02
0x220 0x00
0x221 0x00
0x222 0x00
0x223 0xC0
0x224 0x00
0x225 0x00
0x228 0x00
0x229 0x00
0x22A 0x00
0x22B 0xC0
0x22C 0x00
0x22D 0x00
0x230 0x00
0x231 0x00
0x232 0x00
0x233 0xC0
0x234 0x00
0x235 0x00
0x238 0x00
0x239 0x00
0x23A 0x00
0x23B 0xC0
0x23C 0x00
0x23D 0x00
0x240 0x00
0x241 0x00
0x242 0x00
0x243 0xC0
0x244 0x00
0x245 0x00
0x248 0x00
0x249 0x00
0x24A 0x00
0x24B 0xC0
0x24C 0x00
0x24D 0x00
0x250 0x00
0x251 0x00
0x252 0x00
0x253 0xC0
0x254 0x00
0x255 0x00
0x258 0x00
0x259 0x00
0x25A 0x00
0x25B 0xC0
0x25C 0x00
0x25D 0x00
0x2B0 0x00
0x2B1 0x05
0x2B5 0x00
0x2B6 0x00
0x2B7 0x00
0x2C1 0x1F
0x2C2 0x3F
LMK04828
0x00 0x00
0x02 0x00
0x100 0x00
0x101 0x55
0x103 0x00
0x104 0x00
0x105 0x00
0x106 0x79
0x107 0x00
0x108 0x00
0x109 0x55
0x10B 0x00
0x10C 0x00
0x10D 0x00
0x10E 0x79
0x10F 0x00
0x110 0x00
0x111 0x55
0x113 0x00
0x114 0x00
0x115 0x00
0x116 0x71
0x117 0x01
0x118 0x00
0x119 0x55
0x11B 0x00
0x11C 0x00
0x11D 0x00
0x11E 0x71
0x11F 0x01
0x120 0x00
0x121 0x55
0x123 0x00
0x124 0x00
0x125 0x00
0x126 0x71
0x127 0x01
0x128 0x00
0x129 0x55
0x12B 0x00
0x12C 0x00
0x12D 0x00
0x12E 0x71
0x12F 0x01
0x130 0x00
0x131 0x55
0x133 0x00
0x134 0x00
0x135 0x00
0x136 0x79
0x137 0x00
0x138 0x04
0x139 0x00
0x13A 0x01
0x13B 0x00
0x13C 0x00
0x13D 0x08
0x13E 0x03
0x13F 0x18
0x140 0x07
0x141 0x00
0x142 0x00
0x143 0x11
0x144 0x00
0x145 0x00
0x146 0x18
0x147 0x3A
0x148 0x02
0x149 0x42
0x14A 0x02
0x14B 0x16
0x14C 0x00
0x14D 0x00
0x14E 0x00
0x14F 0x7F
0x150 0x03
0x151 0x02
0x152 0x00
0x153 0x00
0x154 0x78
0x155 0x00
0x156 0x96
0x157 0x00
0x158 0x96
0x159 0x00
0x15A 0x78
0x15B 0xD4
0x15C 0x20
0x15D 0x00
0x15E 0x00
0x15F 0x0E
0x160 0x00
0x161 0x02
0x162 0x5D
0x163 0x00
0x164 0x00
0x165 0x0C
0x166 0x00
0x167 0x00
0x168 0x0C
0x169 0x59
0x16A 0x20
0x16B 0x00
0x16C 0x00
0x16D 0x00
0x16E 0x16
0x17C 0x15
0x17D 0x0F
LMX2582
0x00 0x200C
0x01 0x080B
0x09 0x0300
0x0A 0x10D8
0x0B 0x0018
0x0C 0x7001
0x0D 0x4000
0x0E 0x018D
0x1E 0x0034
0x1F 0x0401
0x22 0x03F0
0x23 0x0215
0x24 0x0511
0x25 0x4000
0x26 0x0036
0x27 0x8204
0x28 0x0003
0x29 0x0003
0x2A 0x0003
0x2B 0x0003
0x2C 0x0000
0x2D 0x0000
0x2E 0x0003
0x2F 0x0FB8
0x30 0xE000
0x31 0x000C
0x40 0x0000
LM95233
0x03 0x00
0x0C 0x01
0x40 0x55
0x41 0x6E
Hi Chase,
I am going through TI204C IP user guide and found that guidelines for accurate sampling of sysref (section 6.6). I am getting sysref and lmfc pulse alignment slightly different as shown in screenshot. So, is this the cause for the noisy signal. Please guide me.
Thanks & Regards
Ramavath Raj Kumar
Hi Raj,
I am summarizing some of points discussed in this thread:
1) The ADC12DJ3200 is compliant with the jesd204b Standard. It uses K28.5 as the comma character in the initial CGS sequence. The K28.7 character is used for marking frame boundaries (where necessary) when frame monitoring is used.
2) If your link comes up, it means that the K28.5 code you have selected in the transceiver wizard is accurate. I am assuming you have started with one of the existing reference designs, so this should already be set in the xci tile
3) If see noise, kindly check the error signals of the IP. You may be having signal integrity issues (or a corruption of the data if buffers have overflowed). For data integrity checks, kindly use the PRBS modes of the ADC to do an eye diagram check.
4) The LMFC pulse and SYSREF are not misaligned. As per the protocol, the LMFC boundary starts when a positive edge is detected on SYSREF. As a result, the LMFC pulse is delayed by a cycle, but it indicates the first cycle of the multiframe.
regards,
Ameet