DAC8574: Problem: reading back a value from DAC8574

Hi Marcel, 

Have you been able to confirm your writes are working by setting a DAC output value and measuring the output?

Can you measure SDA and SCL on a scop and share a screenshot of the attempted read sequence?

Best,

Katlynne Jones

Hello Katlynne

We have used this chip before on several products..

On our board as discribed we use it to set the several channels A through D on the 16 chips and that runs. We get DAC outputs.

Now is the first time I try to read back a value from the chip.

Right now I have the feeling I don;t get valid data back from the chips.

There must be something I am doing wrong?

Is it possible to write to the temporary register of a selected channel A and read back this value?

Can you present me an example of a sequence I have to write and then read a value back for 1 chip and 1 channel.

Regards

Marcel Loos

Hi Marcel, 

Can you please measure SDA and SCL on a scope and share a screenshot of the attempted read sequence so I can verify what you are actually doing and check for correctness? 

The procedure is shared in the datasheet with a visual representation and example sequence. 

Start bit, I2C address with R/W low, control byte address, repeated start, I2C address with R/W high, clock 2 or 3 bytes of data until DAC NAK, stop bit.

Best,

Katlynne Jones

Hello Ketlynne

I made a simple program to write to and readout 1 chip

HW adress lines A3=0, A2=1, A1=0, A0=0

Sequence for write is 

start 0x98, 0x41, 0x80, 0x00 stop

Sequence for read 

start 0x98, 0x41, restart 0x99, read, read, read

Data returned 0x3F 0x00 0x00

Regards

Marcel Loos

Hi Marcel, 

This looks correct, and the readback is correct if you had written 00 to the PD1 and PD2 bits. Perhaps the write did not take. Can you verify on your hardware that the output actually was set to 100k to GND and not high impedance?

Can you try writing 0x40, 0x55, 0x55 and repeat your read sequence to see if we at least get the correct data back? 

Best,

Katlynne Jones

Hello Katlynne.

If I write 0x80 to the Power down register in the device I would expect a readback value of 0xBF in stead of  0x3F ?

Regards

Marcel

Hello Katlynne

Uploading an image does not seem to work.

I stopped trying

Regards

Marcel

Hi Marcel, 

This is correct. This is why I am wondering if the write to the power down register actually worked. 

Marcel Loos said:

I would expect a readback value of 0xBF in stead of  0x3F

Try to confirm the write worked by verifying that the DAC output is actually in 100k to GND and not high impedance. 

You can also try writing something to the data register and seeing if the read produces the correct data. My suggestion was to write 0x40, 0x55, 0x55 and repeat your read sequence.

You should be able to copy past images directly into the text box, drag images directly into the text box, or use the insert > Image/video/file in the drop box options at the bottom of the text box. 

Best,

Katlynne Jones

Hello Katlynne

The reference voltage for the chip is 3V3

For now I have set 1 chip channel A to about 1Volt. I have confirmed this by measuring the output with a multimeter. I also measured several other chips on channel A they where all 0 Volts.

Write sequence

Read sequence

Output of my test program

Write DAC8574 Oke
Address: 98 50 Data 4D 94
Read DAC8574 Oke
Address: 98 51 Data [3F] 0 0

The adress in logic analyser is 7 bits so 4C + Read/Write bit is 0x98 or 0x99

The dac value written is 19860 * 3.3 / 65535 gives me about 1V volts

Kind regards

Marcel

Hello Katlynne 

Your collegue Paul Frost replied some time ago with :

Hi Marcel,

This is actually expected behavior.  Due to the device have the same first two address bits (A1, A0), the device are not able to know if the two bits in the command byte (A3, A2) are valid, and must ACK the first byte only.  The device will not actually update the registers or DAC if the A3+A2 bits do match the command, so that is how we support 16 devices.

For you to detect missing devices, I would recommend issuing a broadcast write to one of the DAC registers, then issue a readback for each device.  

Thanks,

Paul

How do I do this in the previous example ?

Regards

Marcel 

Hi Marcel,

Paul's response is answering an issue related to writes where the first byte in a write is ACK'd, but the following are not due to the incorrect address bits. You verified that the write to the data register was successful by measuring the DAC output. 

Broadcast mode is used by setting the loa bits to 0b11 so the device ignores the local address (A3/A2):

When in this sequence do you see the DAC output go to 1V? With command 0x50 you are loading the temporary register with the data so you should not see the DAC update on this command. 

In the read sequence, you are using command 0x51 to read the data register. At this time, you would not have loaded anything into the data register, so a readback of 0x3F, 0x0000 would be correct. 

Best,

Katlynne Jones

Hello Katlynne 

About the 0x50 I send, I get an value of 1 V as I would expect.

As I understand for clarity for me once more

bit 

76543210

AALLXSSP

3210X100

01010000 bin gives me 0x50 hex

Axx = 01 depends on Adres lines A3 and A2 in hardware 

Lxx = 01 -> 

Update selected DAC with I2C data. Most commonly utilized mode. The contents of MS-BYTE and
LS-BYTE (or power down information) are stored in the temporary register and in the DAC register of
the selected channel. This mode changes the DAC output of the selected channel with the new data

X = don't care

Sxx = 00 -> Channel Select Bits : Channel A selected

P = PD0 = 0 -> Power Down Flag, 0 = Normal operation

So then I think the DAC channel A is updated with data coming from MSB and LSB.

So now I have 1V on the output

Can I read this value back ? It doesn't work for me yet.

What is the temporary register? Is it a write only register ? Is it being reset every time a write or read is done?

About Images

I included some pictures of a logic analyser, but when I copied and pasted them in they shrunk a lot. 

The pictures became unclear I think ?

WHen I try insert image/video/file to include pictures on the form, every time I get a message: "The file or URL is not allowed to be inserted" Is this because the file is not the propper size ? 320 x 240 pixels ?

Regards,

Marcel

Hi Marcel, 

I can see the logic analyzer images you posted yesterday just fine. The images expand if you click on them. 

My mistake, you are right, command 0x50 should update immediately and 0x51 should be expected to read back the power down data and DAC code. 

Temporary register would be a write to 0x40. The temporary register is updated, but the DAC output register is not updated, so the output does not update. 

Let me order an EVM and get the I2C reads working on my end and I will share the sequence with you. You seem to be doing the correct sequence per the datasheet, so I will double check on the EVM. 

Best,

Katlynne Jones 

Write DAC8574 Oke write to DAC8574 with no errors
Address: 98 80 Data 0 E write of data U11 store i2C
Write DAC8574 Oke write to DAC8574 with no errors
Address: 98 40 Data 0 7 write of data U10 store i2C
Read DAC8574 Oke Read OK
Address: 98 41 Data [3F] 0 9 Read of data U10 store i2C, first data that ever came out on logic analyser was 0x00
a-DAC: 9 error: 0 end of test a

Write DAC8574 Oke
Address: 98 90 Data 0 B write of data U11 update channel A
Write DAC8574 Oke
Address: 98 50 Data 0 D write of data U10 update channel A
Read DAC8574 Oke
Address: 98 51 Data [3F] 0 9 Read of data U10, update channel A
b-DAC: 9 error: 0 end of test b

Write DAC8574 Oke
Address: 98 80 Data 0 E write of data U11 store I2C
Write DAC8574 Oke
Address: 98 40 Data 0 7 write of data U10 store I2C
Read DAC8574 Oke
Address: 98 41 Data [3F] 0 9 Read of data U10 store i2C
c-DAC: 9 error: 0 end of test c

Write DAC8574 Oke write to chip with same "address byte" as U10 or U11
Address: 98 0 Data 0 E all data is acked ?
Write DAC8574 Oke
Address: 98 0 Data 0 7 all data is acked ?
Read DAC8574 Oke
Address: 98 1 Data [3F] 0 9 all data is acked ?
d-DAC: 9 error: 0 end of test d

loop back to test a

The first test of a returned 0 so temp register is write only register ?
test a: E & 7 = 6 NOK

test b: B & D = 9 OK

test c: E & 7 = 6 NOK

test d: E & 7 = 6 NOK

the results is that I think the temporary register is write only register
If the "address byte" is correct the chip acks all other data.
if chips are parrallel on the bus all data is "and"-ed logical

Write DAC8574 Oke
Address: 98 80 Data 0 E
Write DAC8574 Oke
Address: 98 40 Data 0 7
Read DAC8574 Oke
Address: 98 41 Data [3F] 0 9
a-DAC: 9 error: 0

Write DAC8574 Oke
Address: 98 90 Data 0 B
Write DAC8574 Oke
Address: 98 50 Data 0 D
Read DAC8574 Oke
Address: 98 51 Data [3F] 0 9
b-DAC: 9 error: 0

Write DAC8574 Oke
Address: 98 80 Data 0 E
Write DAC8574 Oke
Address: 98 40 Data 0 7
Read DAC8574 Oke
Address: 98 41 Data [3F] 0 9
c-DAC: 9 error: 0

Write DAC8574 Oke
Address: 98 0 Data 0 E
Write DAC8574 Oke
Address: 98 0 Data 0 7
Read DAC8574 Oke
Address: 98 1 Data [3F] 0 9
d-DAC: 9 error: 0

Hi Marcel, 

I will try to confirm this behavior on the EVM.

Best,

Katlynne Jones

Do you have any findings yet?

It appears to me as if, after recieving the "Adress Byte" which is correct, the DAC8574 acks all further data.

Also if there are multiple DAC8574 on a board with the same base "Adress Byte" they all acknowldge further data.

For my Project

We use addresses lines on the chips A3, A2, A1 and A0
                           AA-AA
                            10 32
U10: Adres 1001100-01
U12: Adres 1001101-01
U16: Adres 1001110-01
U18: Adres 1001111-01
U11: Adres 1001100-10
U13: Adres 1001101-10
U15: Adres 1001110-10
U17: Adres 1001111-10

for example 

on the same base "Adress Byte" are

U10 and U11,

U12 and U13

U16 and U15

U18 and U17

Kind regards

Marcel Loos

Hi Marcel, 

I have the two EVMs in the lab and working on them getting brought up together so I can test having two devices with the same address byte (A0 and A1) wth different A3 and A2. Should have this confirmed by the end of the week. 

Best,

Katlynne Jones

Hi Marcel, 

So far I am seeing similar results with the two EVMs sharing A0 and A1 with different A2 and A3. I am going to repeat the test side by side and compare the behavior with using one EVM only and the results with both EVMs using the same A0 and A1. 

Best,

Katlynne Jones

Hello Katlynne

On device  1 write 0xFF to channel A, on device 2 write 0x42 on channel A, What do you get back when you read device 1 channel A?

Kind regards,

Marcel Loos

Hi Marcel, 

I'll be back in the lab tomorrow and can give this a try. 

Best,

Katlynne Jones

Hi Marcel, 

The return is 0x42. Device 1 is not pulling down the bus when it outputs 0xFF so we are able to see the real data in device 2. 

Best,

Katlynne Jones