Hello,
Sometimes when communicating with the ADS1247, I receive the upper byte (first byte clocked) as all 1's (0xFF). Is there some timing between the CS going low and the start of the clocks? I run the CPU at 4Mhz.
Suggestions?
Jon
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Hello,
Sometimes when communicating with the ADS1247, I receive the upper byte (first byte clocked) as all 1's (0xFF). Is there some timing between the CS going low and the start of the clocks? I run the CPU at 4Mhz.
Suggestions?
Jon
Jon,
Welcome to the forum! You need at least 10ns between the falling edge of CS and the rising edge of SCLK. See figure 1 of the datasheet. As far as the invalid data, are you running in SDATAC mode and then executing RDATA, or are you running in RDATAC mode? If in RDATAC mode, are you polling the DRDY pin or using an interrupt? Do you have any scope shots showing this behavior that you can share with us?
Usually we see invalid data when running in RDATAC mode and the results are read too close to an update.
Best regards,
Bob B