Other Parts Discussed in Thread: DAC39RF10EVM
Tool/software:
Hello：
Regarding the material DDS39RF12ACK, the customer needs to confirm several issues.
1、The phase noise at 1G in the manual has reached -170. Why is NSD only -157 at 1G.？
2. The demo board (DAC39RF10EVM) was tested using the SMA100A clock input. Could you please take a look and provide the phase noise map and related spurious signals (0-FDAC/2) at 1G, 2G, 3G, 4G, and 10G outputs when using SMA100A as the reference clock？