Other Parts Discussed in Thread: TSW14J57EVM, DAC38RF82EVM, DAC38RF80EVM
Tool/software:
Hello,
I am evaluating the DAC38RF82EVM with the TSW14J57EVM pattern generator and DAC38RF8x Gui + HSDC pro software
The DAC38RF82EVM is configured to use the on-Chip PLL Clock Mode (CMODE3).
I do follow the operating procedure described in the DAC38RF82EVM user's guide SLAU671A, chapter 2.1.5 through to 2.1.6.
In HSDC Pro, I managed to create tones as well as loading external pattern files and send them to the TSW14J57EVM.
I managed to get the DAC to output RF tones and more complex RF signals.
The issues is that the DAC often fails to output any signals and I always follow the same procedure.
This can happen just after powering up both EVM boards or after uploading a new waveform into the pattern generator.
I never get any warning or error message.
I can eventually get it to generate some RF after power cycling both DAC38RF82EVM and TSW14J57EVM.
When the problem occurs, if I untick 'NCO enable' 'AB path' in the Digital DAC tab in the DAC38RF8x Gui , the DAC will output a signal at the reference clock frequency plus its harmonics.
Should I assume that the DAC does not receive the samples for the pattern generator?
Please give me some guidance on how make the evaluation kit much more reliable.
Thank you
Ludovic
